This short video explains how computers change the overflow flag when adding or subtracting

two signed integers represented in two's complement.

Let's first quickly review what is two's complement.

Most modern computers use, two's complement, to represent signed integers.

This number wheel lists five-bit two's complement integers.

Positive numbers and zero are simply represented as themselves.

Negative numbers are represented in this way: Invert every bit of its positive equivalent,

and then add 1.

For example, suppose we want to find out how to represent -3 in two's complement.

First of all, we translate positive 3 to binary.

In the first step, we flip every bit.

In the second step, we add one.

The final result is 11101, which is the two's complement representation of -3.

When adding two signed numbers represented in two's complement, overflow can only happen

when adding two numbers of the same sign, but getting a result with a different sign.

There are two possible scenarios.

In the first scenario, add two positive numbers, but produce a negative result.

In the second scenario, add two negative numbers, but get a positive result.

This shows an example of the first scenario, in which overflow is generated when the sum

of two positive number is negative.

Suppose we are adding 12 and 5.

The result is 10001, which represents -15 in two's complement.

This happens because the correct result 17 is larger than the maximum representable number 15.

In the following, we will show how to detect overflow by using the number wheel.

Numbers can be added or subtracted by moving round the number wheel, clockwise for adding

a positive number or subtracting a negative number, and counterclockwise for subtracting

a positive number or adding a negative number.

In this 5-bit example, overflow happens when the movement crosses the boundary between

15 and -16.

As explained in the previous slide, adding two numbers of the same sign must produce

a result of the same sign.

Otherwise, overflow has happened, indicating the result has fell out of the representable range.

Similarly, subtracting two signed integers generates overflow if the result is too large

or too small to fit into the representable range.

For example, subtracting 7 from -13 should produce -20, which is out of the representable range.

Accordingly, this subtraction generates overflow.

We can detect overflow by using the number wheel.

If subtracting a positive number, we move along the wheel counter-clockwise.

On the other hand, if subtracting a negative number, we move along the wheel clockwise.

Whenever the movement crosses the boundary between 15 and -16, overflow is generated,

and the overflow flag is set.

This figure shows both the general-purpose registers and the special-purpose registers

on ARM Cortex-M microprocessors.

The overflow flag is stored in one of the special purpose registers.

This register is called Program Status Register, or called PSR.

This shows the content of the program status register.

The V bit represents the overflow flag.

If V is 1, overflow has happened.

If V is zero, no overflow has been generated.

This table shows the meaning of the overflow flag when ALU adds or subtracts two signed numbers.

If the overflow flag is zero, the result of signed addition or signed subtraction is correct.

However, if the overflow flag is one, the result of signed addition or signed subtraction

is incorrect.

Application software has to check, whether or not overflow is generated, in order to

prevent erroneous results.

It is interesting to compare the overflow flag and the carry flag.

The reason causing the difference is that we need a carry flag for adding two unsigned

numbers, and a borrow flag for subtracting two unsigned numbers.

ARM Cortex-M microprocessors choose to use the same flag bit to represent both the carry

flag and the borrow flag.

Specifically, carry equals not borrow.

See this tutorial for detailed explanation.

Please visit the book website for more materials.