Hyper-threading is Intel's proprietary simultaneous multithreading implementation used to improve
parallelization of computations performed on x86 microprocessors. It first appeared
in February 2002 on Xeon server processors and in November 2002 on Pentium 4 desktop
CPUs. Later, Intel included this technology in Itanium, Atom, and Core 'i' Series CPUs,
among others. For each processor core that is physically
present, the operating system addresses two virtual or logical cores, and shares the workload
between them when possible. The main function of hyper-threading is to decrease the number
of dependent instructions on the pipeline. It takes advantage of superscalar architecture.
They appear to the OS as two processors, thus the OS can schedule two processes at once.
In addition two or more processes can use the same resources. If resources for one process
are not available, then another process can continue if its resources are available.
Hyper-threading requires not only that the operating system supports SMT, but also that
it be specifically optimized for HTT, and Intel recommends disabling HTT when using
operating systems that have not been optimized for this chip feature.
Overview
Hyper-Threading Technology is a form of simultaneous multithreading technology introduced by Intel.
Architecturally, a processor with Hyper-Threading Technology consists of two logical processors
per core, each of which has its own processor architectural state. Each logical processor
can be individually halted, interrupted or directed to execute a specified thread, independently
from the other logical processor sharing the same physical core.
Unlike a traditional dual-core processor configuration that uses two separate physical processors,
the logical processors in a Hyper-Threaded core share the execution resources. These
resources include the execution engine, the caches, the system-bus interface and the firmware.
These shared resources allow the two logical processors to work with each other more efficiently,
and lets one borrow resources from the other when one is stalled. A processor stalls when
it is waiting for data it has sent for so it can finish processing the present thread.
The degree of benefit seen when using a hyper-threaded or multi core processor depends on the needs
of the software, and how well it and the operating system are written to manage the processor
efficiently. Hyper-threading works by duplicating certain
sections of the processor—those that store the architectural state—but not duplicating
the main execution resources. This allows a hyper-threading processor to appear as the
usual "physical" processor and an extra "logical" processor to the host operating system, allowing
the operating system to schedule two threads or processes simultaneously and appropriately.
When execution resources would not be used by the current task in a processor without
hyper-threading, and especially when the processor is stalled, a hyper-threading equipped processor
can use those execution resources to execute another scheduled task.
This technology is transparent to operating systems and programs. The minimum that is
required to take advantage of hyper-threading is symmetric multiprocessing support in the
operating system, as the logical processors appear as standard separate processors.
It is possible to optimize operating system behavior on multi-processor hyper-threading
capable systems. For example, consider an SMP system with two physical processors that
are both hyper-threaded. If the operating system's thread scheduler is unaware of hyper-threading,
it will treat all four logical processors the same. If only two threads are eligible
to run, it might choose to schedule those threads on the two logical processors that
happen to belong to the same physical processor; that processor would become extremely busy
while the other would idle, leading to poorer performance than is possible by scheduling
the threads onto different physical processors. This problem can be avoided by improving the
scheduler to treat logical processors differently from physical processors; in a sense, this
is a limited form of the scheduler changes that are required for NUMA systems.
History Denelcor, Inc. introduced multi-threading
with the HEP in 1982. The HEP pipeline could not hold multiple instructions that were independent
because they belonged to different processes. Only one instruction from a given process
was allowed to be present in the pipeline at any point in time. Should an instruction
from a given process block in the pipe, instructions from the other processes would continue after
the pipeline drained. Intel implemented hyper-threading on an x86
architecture processor in 2002 with the Foster MP-based Xeon. It was also included on the
3.06 GHz Northwood-based Pentium 4 in the same year, and then remained as a feature
in every Pentium 4 HT, Pentium 4 Extreme Edition and Pentium Extreme Edition processor since.
Previous generations of Intel's processors based on the Core microarchitecture do not
have Hyper-Threading, because the Core microarchitecture is a descendant of the P6 microarchitecture
used in iterations of Pentium since the Pentium Pro through the Pentium III and the Celeron
and the Pentium II Xeon and Pentium III Xeon models.
Intel released the Nehalem in November 2008 in which hyper-threading made a return. The
first generation Nehalem contained four cores and effectively scaled eight threads. Since
then, both two- and six-core models have been released, scaling four and twelve threads
respectively. The Intel Atom is an in-order processor with
hyper-threading, for low power mobile PCs and low-price desktop PCs.
The Itanium 9300 launched with eight threads per processor through enhanced hyper-threading
technology. Poulson, the next-generation Itanium, is scheduled to have additional hyper-threading
enhancements. The Intel Xeon 5500 server chips also utilize
two-way hyper-threading. Performance claims
The advantages of hyper-threading are listed as: improved support for multi-threaded code,
allowing multiple threads to run simultaneously, improved reaction and response time.
According to Intel the first implementation only used 5% more die area than the comparable
non-hyperthreaded processor, but the performance was 15–30% better.
Intel claims up to a 30% performance improvement compared with an otherwise identical, non-simultaneous
multithreading Pentium 4. Tom's Hardware states "In some cases a P4 running at 3.0 GHz with
HT on can even beat a P4 running at 3.6 GHz with HT turned off." Intel also claims significant
performance improvements with a hyper-threading-enabled Pentium 4 processor in some artificial intelligence
algorithms. Overall the performance history of hyper-threading
was a mixed one in the beginning. As one commentary on high performance computing from November
2002 notes:
Hyper-Threading can improve the performance of some MPI applications, but not all. Depending
on the cluster configuration and, most importantly, the nature of the application running on the
cluster, performance gains can vary or even be negative. The next step is to use performance
tools to understand what areas contribute to performance gains and what areas contribute
to performance degradation.
As noted above, performance improvement seen is very application-dependent; however, when
running two programs that require full attention of the processor it can actually seem like
one or both of the programs slows down slightly when Hyper-Threading Technology is turned
on. This is due to the replay system of the Pentium 4 tying up valuable execution resources,
equalizing the processor resources between the two programs which adds a varying amount
of execution time. The Pentium 4 "Prescott" and the Xeon "Nocona" processors received
a replay queue, which reduces execution time needed for the replay system. This is enough
to completely overcome that performance hit. Drawbacks
When the first HT processors were released, many operating systems were not optimized
for hyper-threading technology. In 2006, hyper-threading was criticised for
energy inefficiency. For example, specialist low-power CPU design company ARM stated simultaneous
multithreading can use up to 46% more power than ordinary dual-core designs. Furthermore,
they claimed SMT increases cache thrashing by 42%, whereas dual core results in a 37%
decrease. Intel disputed this claim, stating that hyper-threading is highly efficient because
it uses resources that would otherwise be idle.
In 2010, ARM said it might include simultaneous multithreading in its future chips; however,
this was rejected in favor of their 2012 64-bit design.
In 2013 Intel dropped SMT in favor of out-of-order execution for its Silvermont processor cores,
as they found this gave better performance. Security
In May 2005 Colin Percival demonstrated that on the Pentium 4, a malicious thread can use
a timing attack to monitor the memory access patterns of another thread with which it shares
a cache, allowing the theft of cryptographic information. Potential solutions to this include
the processor changing its cache eviction strategy, or the operating system preventing
the simultaneous execution, on the same physical core, of threads with different privileges.
See also Simultaneous multithreading
Computer multitasking Multi-core processor
Barrel processor References
External links Intel – high level overview of Hyper-threading
Hyper-threading on MSDN Magazine HyperThreading Overview from OSDEV Community
introductory article from Ars Technica Hyper-Threading Technology Architecture and
Microarchitecture, technical description of Hyper-Threading
US Patent Number 4,847,755 Merom, Conroe, Woodcrest lose HyperThreading
ZDnet: Hyperthreading hurts server performance, say developers
ARM is no fan of HyperThreading - Outlines problems of SMT solutions
Replay: Unknown Features of the NetBurst Core