This short video will provide you with an overview of the Agilent 86108B precision waveform analyzer,
the newest plug-in module for the 86100C DCA-J and the 86100D DCA-X wide-bandwidth oscilloscope
platform. The 86108B has been engineered for precision waveform analysis
on high-speed digital designs to 32 gigabits per second. The 86108B provides engineers
and designers with unprecedented performance providing more margin for your designs. It
does this by providing wide analog bandwidth, a precision timebase, and provide the world's
lowest timebase jitter at less than 50 femtoseconds rms. The 108B also has the widest clock recovery
range providing continuous data rate coverage from 50 megabits per second all the way to
32 gigabits per second. The 108B provides unmatched value and flexibility which reduces
the product development times and costs. Finally, the 86100D mainframe together with the 86108B
provide very advanced analysis capability which allow designers to validate their designs
more quickly. We'll start with a quick demo that illustrates the precision measurement
capability and the ultra low timebase to drive the 86108B. With only one button push, we
can switch into jitter mode and do a very in-depth analysis of the jitter on the incoming
signal. The jitter mode automatically analyzes the data rate, the pattern length, and
separates the jitter into random and deterministic components and then calculates total jitter
at a user specified BER. Here you can see that the random jitter is well below 50 femtoseconds
rms which gives the designer confidence that when you're measuring a high-speed signal
such as a 28 gigabit signal, the jitter measurement is that of your DUT and the contribution from
the scope is negligible. As data rates increase to 28 gigabits per second and beyond, accurate
component characterization becomes more difficult. Devices such as this 28 nanometer SerDes core
from Avago Technologies can benefit from the measurement performance of the 86108B as it
can quickly and accurately measure the core's high signal integrity and exceptional jitter
performance. This SerDes supports numerous standards that range all the way from 1 gigabit
to 28 gigabits per second and beyond. As noted earlier, this setup is very quick and easy.
Shown here is a jitter measurement on a differential pair operating at 28.05 gigabits per second.
The 86108B helps designers make accurate measurements on devices such as these where the random
jitter is less than 350 femtoseconds and the total jitter estimated at 10-12 is less than
10 picoseconds. There are times when a designer needs to be able to analyze a signal after
it's passed through a lossy channel such as a backplane. In cases like this, sometimes
the loss or the inter-symbol interference that's introduced can be so excessive that
it can actually close the eye diagram. In a case such as this, the hardware clock recovery
may not be able to recover a clock, and therefore there wouldn't be any trigger for the oscilloscope.
The 86108B module includes an auxiliary clock recovery input that helps to address this
issue. Designers can normally configure the transmitter so that an adjacent channel can
operate at a sub-rate of the main signal under test or the adjacent signal could be set up
as a clock signal as well. The key in this setup is that the jitter profile on the main
signal under test connected to channel 1 and 2 is going to be very similar to the signal
shown here going into the auxiliary clock recovery input. Another possible solution
would be to use the reference clock signal. It's possible to evaluate the effectiveness
of an equalizer on that closed eye by applying a software CTLE or continuous time linear
equalizer or LFE, linear feed forward equalizer. And then open the eye. InfiniiSim DCA is embedding
and de-embedding software for FlexDCA. It's easy to configure FlexDCA to remove or de-embed
the effects of a fixture or a cable and open the eye in order to improve measurement margins.
86108B Option JSA provides jitter spectrum analysis and software clock recovery emulation
capability. Using a real-time acquisition system inside the clock recovery circuit,
the 86108B can measure and display the jitter spectrum of a data or a clock signal. Similar
to phase noise plots from a spectrum analyzer, these spectral views provide valuable insight
into jitter and can help track root cause of excessive jitter to a reference clock,
for example. Option JSA also provides engineers with the flexibility of analyzing their designs
using software clock recovery emulation. Ideal first, second, and third order of clock recovery
designs with adjustable loop bandwidth and peaking can be configured. The ideal software
CRE design can be used to optimize jitter mode results by removing the effects of any
non-ideal response from the hardware clock recovery. For more information, please visit
www.agilent.com/find/86108B.