Semiconductor manufacturing is heavily dependent on deposition
techniques. It is one of the key aspects of the semiconductor manufacturing "gameplay loop".
We add thin layers, modify them, maybe remove some of its parts, and then do it all over again.
But as transistor sizes have shrank, those thin layers have
shrank too. To the point where we now have to deposit these new layers atom by atom.
Atomic Layer Deposition. As the name implies,
it is a special variant of Chemical Vapor Deposition tuned for nanometer scale.
In this video we are going to look at this incredible nanotechnology.
## Beginnings
Atomic Layer Deposition has a well-documented history.
It is generally acknowledged to have been independently invented twice.
In the 1960s, the Soviet Union produced a "molecular layering" technique.
This was based on a 1952 thesis by Professor Valentin B. Aleskovskii
at the Leningrad Institute of Technology.
He worked together with another Professor - S. I.
Koltsov - throughout the 1960s and the 1970s to develop this technique.
Molecular layering is ALD in all but name. And it might have given the
Soviet Union a strong advantage in semiconductor manufacturing.
But many prominent Soviet scientists did not understand molecular layering. Furthermore,
they did not believe that it was even possible to create a structure with atomic precision.
When Aleskovskii and Koltsov attempted to patent the process in April 1971,
the Soviet patent office remarkably rejected it.
The two and their colleagues continued their work in academia, but no industrial-level
activities were ever initiated. Yet another missed opportunity for the Soviet Union.
## Finland
ALD as we know it today was invented in Finland.
In 1973, Dr. Tuomo Suntola - a professor in electrical engineering at the Helsinki
University of Technology - was contacted by Instrumentarium Oy, a medical instrument importer.
Dr. Suntola was a rising star. He received his doctorate at 28,
the youngest to do so in the electrical engineering department.
And he had already distinguished himself by inventing a thin polymer film humidity sensor
for the company Vaisala - the Humicap. The invention is still widely used today.
Instrumentarium wanted to develop their own technology products and invited
Suntola to establish a research group to literally just find whatever. Such
an open-ended goal was only possible based on Suntola's prior success.
Eventually Suntola and his team proposed two promising areas
of study - ion-selective sensors and electroluminescent flat panel displays.
The latter are a type of flat panel display different from LEDs or OLEDs.
They are quite compact, power efficient, and deliver high contrast and brightness.
Suntola's presentation to Instrumentarium's management had been very abstract. The
CEO was literally like "I am still confused", but approved it anyway.
Suntola started work on the displays with a colleague working on the sensors.
## Insufficient Deposition
Many other people had before tackled the problem of fabricating flat panel displays.
At the time, semiconductor manufacturers used one of two techniques for laying
on these thin material films - sputtering and thermal evaporation.
In the former, we accelerate ions towards a target material like a
metal. The impact ejects small particles of the metal which
fly out towards the desired location where it accumulates as a thin film.
In the latter, we heat up a material like a metal in a vacuum chamber to its evaporation point.
It vaporizes and travels over to the target location where it accumulates as a thin film.
Dr. Suntola knew from his previous experience with thin films that these
tools were not sufficient. You did not have enough control over the thin films.
In early June 1974, Suntola was pondering over this while in his lab. They had not moved
in the equipment yet so it was mostly just tables and a Periodic Table up on the wall.
Looking up on that table, the idea came to him:
> Looking at the Periodic Table, and thinking of the overall symmetry in nature,
to me came the idea of “serving” the complementary elements of a
compound sequentially, one at a time, onto a surface.
This is the crux of Atomic Layer Deposition.
Though back then they called it "Atomic Layer Epitaxy".
## ALD Principles
Like its big brother Chemical Vapor Deposition,
Atomic Layer Deposition brings together various chemical precursors.
The big difference is in how we bring in the chemicals to the substrate. Rather
than just throwing them all in there like a Instant Pot and letting them go to town,
we introduce the reactants one after the other through a set of "pulse" and "purge" actions.
First, we "pulse" a primary reactant onto the
substrate. Some of this reactant gets chemically absorbed into said substrate.
Then we "purge" that reactant by flushing an inert gas through the reactor chamber. It cleans off any
reactants that has not been absorbed into the substrate. This is our first pulse-purge cycle.
Now we do a second round of pulse-purge actions but with a different chemical.
This one will react with the first absorbed reactant to form just a
portion of our deposited layer - usually a single atom thick.
We repeatedly run this cycle until we achieve a layer of the appropriate thickness.
This is all done in a very controlled environment. The temperature in particular
is important - high enough to facilitate the absorption of the first reactant into
the substrate, but not high enough to cause uncontrolled reactions.
So imagine it as kind of like pouring batter into a cake pan. With CVD we dump all the
contents into the pan and let it spread out over the width of the pan via its own devices.
This method works and might work faster, but at the same time the batter might be
unevenly spread across the pan. Especially if the pan itself has some bumpiness of its own.
But if we were to slowly spoon in the batter into the pan - meticulously flattening it out every
time we do so - then it is far more likely to get a clean, evenly distributed layer.
The basic form of ALD is to have these two alternating A and B
steps. But more advanced versions of the technique can have multiple steps.
The additional steps of this ABC ALD cycle can be used to modify
the temperature environment or the materials' properties.
You can also have ALD super-cycles, with multiple ALD cycles to get a particular thin film.
## Panels
After Dr. Suntola came up with the idea, turning it into reality came relatively quickly.
The first experiments took place in August 1974,
laying down a thin layer of the light-emitting zinc sulfide. It
worked right off the bat - though slower than expected - and produced fantastic display layers.
Electroluminescent displays need ALD to produce dense layers without any small voids or bubbles
- called "pinholes" in the industry. Such things help the layers last longer in working conditions.
His team filed the first patent in November 1974 in Finland - with the US,
Japan, and the Soviet Union coming thereafter.
Instrumentarium realized that this was out of their wheelhouse and sold the project to
the TV maker Lohja. Lohja was able to bring more resources for development.
The technique was not unveiled to the public until 1980, shocking the audience with its quality.
## Finding Applications
At first, ALD's only practical applications were in display manufacturing.
ALD was called "Atomic Layer Epitaxy" back then. But the
semiconductor makers struggled to accept it as an epitaxy.
"Epitaxy" techniques are reserved for single-crystal thin films like
silicon. ALD can certainly do this,
but it struggled to compete against existing epitaxy methods like molecular beam epitaxy.
People soon realized that the technique was better suited for depositing non-crystalline
layers - called "amorphous layers". Amorphous layers of dielectrics or insulators for instance.
Such a thing became ALD's second major commercial application when the hard drive industry adopted
it to deposit thin layers of aluminium oxide onto the read/write heads of their disk drives.
Considering the lack of interest in epitaxy, a name change was in order. The original first
option "Atomic Layer Chemical Vapor Deposition" or ALCVD didn't work out because of a copyright.
Thus, they decided to go with the name they have now - Atomic Layer
Deposition - and that has worked out very well.
## Semiconductors - Logic
The IC makers grew interested in using ALD to produce very thin films
capable of uniformly covering substrates regardless of its shape or topography.
Pioneering research in the 1990s eventually led to one of the first big semiconductor ALD use cases:
producing the ultra-thin High-K dielectric layer in a planar transistor's gate.
In a planar transistor, the gate keeps electrons
from leaking through the gate from the source to the drain.
In 2007, Intel replaced the traditional silicon dioxide with hafnium oxide - the
High-K/metal gate - to better prevent electron leakage across said gate.
ALD became the generally accepted way to deposit this layer. That is because
the hafnium oxide gate layer is less than 5 nanometers thick, so we need atomic precision.
And also with other methods like sputtering,
engineers worried about potentially damaging the silicon substrate below the gate.
Intel's adoption of ALD largely cleared the concerns that the semiconductor industry
previously had about the technique, making it an important part of the manufacturing portfolio.
Even with 3D FinFET gates, insulating gate oxides are deposited using ALD.
## Semiconductors - Memory
And in memory, ALD is used to help deposit thin
layers on the increasingly challenging topologies of modern memory structures.
Modern dynamic RAM cells have a transistor and a capacitor. The
latter carries a charge which represents either a 1 or a 0.
But as those cells have scaled down in size, the capacitor has gotten taller and skinnier.
Some of the films in these capacitors - necessary for the capacitor to hold
its charge - measure as thin as 6 to 8 nanometers. Considering the
thinness of the film and the skinniness of the capacitor, ALD works perfectly.
In 1998, Samsung announced that they would adopt ALD for producing their 256 megabit
Dynamic RAM products with their 180 nanometer process. Though it seems
like this was not actually adopted until the 1 gigabit DRAM generation.
## Interconnects
IC makers have also adopted ALD into another significant portion of the
semiconductor manufacturing process - Back End of the Line processes or BEOL.
These complement the Front End of the Line or FEOL. In Front End, you create the transistor
structures. In Back End, you connect those transistors together with metal interconnects.
In the late 1990s, the semiconductor industry switched from aluminium
interconnects to copper ones. Copper interconnects offer superior electrical
properties and reliability but also some tricky manufacturing challenges.
One of them is that copper atoms can easily diffuse into the silicon, degrading it.
So we need to first lay down a barrier layer made
from dielectric - typically made from tantalum or tantalum nitride.
For a long time, we did this with sputtering or traditional CVD. But as the interconnects shrank,
we eventually switched to ALD to make our barrier layers thin enough.
Though the old ways remained widely used until at least the 7 nanometer generation
due to concerns regarding impurities left over from the chemical reactions.
## Downsides
This is a good opportunity to discuss some of ALD's downsides.
First as I mentioned, it is a technique dependent on chemical reactions. So you
can only do ALD if there exists a chemical reaction that you can take advantage of.
And as with any chemical reaction, you have to worry about impurities. This is
due to the practical problems of the ALD method. Not all of the reactants
absorbed into the surface of the substrate end up participating in the reaction.
Good processes and tools can get the impurity rate down to a fraction of a percent,
but is it within the tolerated budget? That is the main issue.
Second, traditional ALD suffers from a slow rate of deposition.
For instance, ALD deposits the aforementioned aluminium oxide layers for a hard drive disk
head at about 0.11 nanometers per cycle or 100-300 nanometers per hour.
Low throughput is a serious concern for any semiconductor fab. But it isn't a dealbreaker
for a couple of reasons. First, if you are depositing layers just 5 nanometers thin,
then 100 nanometers an hour ain't a huge deal.
Second, you can batch these processes together. I remember seeing one batch
reactor applying an anti-tarnishing layer on 2,000 jewelry pieces at one time. Though
one should note that it takes longer to pulse and purge a larger chamber.
And third, we have new spatial ALD tools. The concept has been around a while,
but this is where you separate the pulse and purge steps by space rather than time.
One way to implement this concept is to have multiple chambers - each for
handling one of the pulse and purge steps - with the wafers moving through them.
The Olympia tool from Applied Materials uses this
concept with the wafers on a drum rotating through various chambers.
## Plasma & Multi-Patterning
Another big development is plasma-assisted ALD.
It uses plasma as the reactant in the second of the two pulse-and-purge cycles.
First encountered in the 1990s by members of Philips Research Labs, plasma-assisted
ALD can produce better quality films and also work in relatively low temperatures.
This new technique also unlocked one of ALD's largest markets - multi-patterning.
I discussed Self-Aligned Double Patterning or SADP in a prior video.
You run a photolithography step.
Then you add oxide "spacers" - silicon dioxide
or some other oxide - directly onto the lithography pattern.
Then you do your etching and remove the spacers.
Now you have lines twice as dense after just a single photolithography step.
Self-aligned Quadruple Patterning is SADP done twice.
Plasma-assisted ALD was ideal for this because you had to be able to deposit
a uniformly thin layer that closely hugged the pattern's turns and corners.
And since it worked at low temperatures below
100 degrees Celsius, it posed less deformation risk for the thin layers.
Intel first introduced SADP into the 22-nanometer nodes due to EUV
being unavailable at the time. The memory makers followed on at the 30-35 nanometer node levels.
Even now that EUV is working, multi-patterning isn't going anywhere. imec's 3 nanometer node
still makes extensive use of 193i lithography with SAQP due to EUV's costs and inherent challenges.
This is good for Bitcoin, err I mean Plasma-assisted ALD.
## Conclusion
Leading edge semiconductors are getting both smaller and taller.
For instance, the major foundries are moving to using Gate-all-around transistors - which
are made up of stacked nano-sheets totally surrounded by the silicon gate.
On the front end of line, these structures have complex topologies.
The challenges of building and coating these is an opportunity
for ALD to take share from traditional deposition processes like PVD and CVD.
On the back end of line, we have new interconnect structures like Through-Silicon-Vias or
TSVs - basically channels connecting different levels of 3D integrated chips. ALD already
plays a big role in 2D copper interconnects and will continue that when they go to 3D.
The work started by Dr. Suntola's team in the 1970s continues to mature and spread
throughout the industry over 50 years later. With Leading edge semiconductors we are moving around
individual molecules and atoms. ALD is one of the few tools capable of letting us do it.