I'm
very happy to be here, and especially on Halloween.
My broom is in the shop so I had to fly Southwest Airlines.
So I did get here though.
So, today we're going to talk about semiconductor packaging.
And I've got a little bit of a tutorial put together to start this off and
then we're going to talk about one of the
hottest topics going right now which is 3D IC.
And I'm going to give you enough background,
I think, but you know, feel free to
save your questions so we can answer them at the end and or
if you have a burning question you can interrupt me during the presentation.
First of all, in the good old days, life was simple.
You just stuck your IC into one of these clever
little packages with legs on it, that was basically a dip.
It could be either ceramic, or plastic. And life was good.
And then things got a little
more complicated, where we introduced all these various packages.
That are still using lead frames.
Which are still around today by the way.
But mostly it was a lead frame type package.
Then we started introducing these
structures called laminate substrates instead
of just a lead frame to put this stuff on.
Higher pin counts, things got a little more complex.
And then all the way up they started getting even more complex
cause we started stacking things, we started putting things in modules.
So, basically, surmise it to say that the complexity in
the packaging has grown over time and still continues to grow.
If we look at where we basically have gone, are we off on Mcord,
because Mcord gave me the slide, so. >>
[LAUGH]
But, this slide we made up ourselves.
So, you can see that, you know, basically, we still have a lot of
these things called dip packages, even though
they've been around a really long time.
We progressed all the way to a TSOP.
and these acronyms are, are kind of thrown around a lot.
And I have an acronym sheet that I'll give you,
if anybody's interested in learning all the terms for this.
But, Thin Small Outline Packages, the TSOP.
And we basically
have gone into this era which we call the area array package.
We have things like ball grid array, CSP, stack packages everybody wants to go
high, more dense on the board so that the only way to go is up.
So we got third dimensional packages.
And I'm going to introduce all these concepts to you, and then the
ultimate package being a wafer-level package, which is no package at all.
So let's take a look at the, some of these package types.
first, the area array package is basically it's what we call a Ball Grid Array.
And mostly it could be a plastic or laminate substrate.
It could be a ceramic substrate.
It could be tape or flex although we don't see much of
those anymore because of the expense and the lack of infrastructure in that.
But these packages are pretty much found on a lot
of your products today, whether it's a laptop or portable product.
And they basically look like they're shown here.
if you look at the construction of this, typically the
plastic ball grid array, or PBGA, has a laminate substrate.
if we have a laser pointer, we can see.
That, this is the laminate substrate.
The early ones were wire-bonded to that substrate, and then
some kind of epoxy mold compound on the top part.
This substrate has typically been a BT resin,
although, there are other substrates that could be
used, and then, these balls are put on the package, and it's mounted to the board.
When these were first introduced, people were.
You know.
Used to the old packages with leaf brands and they were
used to inspecting the package once it was put on the board.
So, they kind of freaked out because they couldn't see these things because they're
underneath this and the only way you could see em was with an x-ray.
So, but people got around that and
they were able to you know, these were
able to move into very, very high volume production.
if we look at some of the other type packages that
are also being used instead of wire bonds, people are doing a
flip-chip package where it's they die is mounted with little bumps
on it onto this carrier which could be either laminate or ceramic.
And then that is, then that's all inside the package.
And then the balls, or
solder balls on the bottom, and we attach that to the board.
So, this is a typical motherboard.
This just happens to be an old Intel motherboard with a package.
And you can see where that package would fit on this board.
And this is a flip chip package.
you can see the exposed die, there's no lid on this.
So this die has been mounted onto the board.
And so these are very common in all of
your processor packages, or something like that would have
a package like that. flip chip.
I use the term flip chip. Flip chip is basically a bump on a die.
And you can have all kinds of different types of bumps.
A very common term you'll hear used is C4.
C4 stands for controlled collapse chip connection.
That's kind of a long word, and when IBM invented that term,
secretaries had to type it up, and that was too long to type.
So they shortened it to just call it C4.
And so that's what a lot of people will call it,
they will use that general term to refer to a flip chip.
But mostly it's a high temperature solder bump in
the early days, a eutectic low temperature solder bump.
in some cases when it's a high temperature solder to a laminate there
would be some solder put on the board and then it would be attached.
also polymer bumps that could be used.
There is also an isotropic
conductive film that could be used.
There is also some, other conductive adhesives that can be used.
But the majority is typically been the solder bump.
If we look at what one of these things basically looks like, your
die sizes, or it can be up to, say, 25 millimeters, on a side.
The I/O counts up to thousands.
Minimum bump pitch somewhere probably a,
a 130 micron is probably where we are today.
very small bump diameters, bump heights of 100 micron being typical.
and a fairly thin package from point four to point
seven five millimeters, mostly laminate substrates here with some ceramics.
And here is a couple of pictures to show
you what these things looked like in the past.
This is actually a flip chip device that is mounted on a module.
So if we look to where kind of the bumps have gone.
The actual original IBM bump was a copper ball back in the 1960s.
And for the widespread adoption of flip chip.
We saw the introduction of a high-lead bump
that was fabricated using an evaporation process, which
turns out to be a fairly expensive process,
but it was made very popular by IBM.
The technology was licensed to companies like Motorola
and AMD, with a cross licensing agreement to Intel.
Now the industry moved from this evaporated bump to a
plated bump, and that's pretty much what we're using today.
That's in all the Intel processors, TI,
IBM, Motorola which became Freescale, AMD, TSMC.
They all use some of these bumps.
The industry is now in the process of moving to something
new which is called a copper pillar, a copper post.
So I'd like to call this Back to the Future.
We started out with copper.
We're going back to copper.
The difference being that on this post that we
have now, there'll be a little bit of a cap.
As you can see here.
That is solder. And that will be connected.
So basically, Intel started this transition.
With the Pressler processor. Now if you
look at any Intel part, they'll all be a copper pillar with some solder cap on it.
And by 2013, 2014, we expect this type of technology for
the flip chip bump to move into very high volume production.
Some of the drivers for this growth in the
flip chip technology are your very high performance, products.
ASICs, field-programmable gate arrays, DSPs, chipsets, graphics, digital TV.
other, like media products, and
then a lot of our wireless products, being driven by form factor and performance.
A lot of our baseband processors moving to flip chip, and I'll talk about this thing
called the package-on-package, or PoP, and that is
an application processor moving to flip chip and that.
So, let's talk about a CSP.
Which is basically the idea of shrinking down,
one of these packages, and basically a chip scale,
a chip size package is what CSP stands for.
it's, a package that's basically the same area almost as a chip.
So it would be, the official definition is with a package with an
edge dimension no more than one point two times that of the die inside.
But it became a marketing term.
So if you take apart.
Anybody got a new iPhone five here, in the room?
Okay, if we ripped
open your phone and we looked at one of these
boards, we would find a lot of CSPs in it.
Chip scale or chip size packages.
You'll notice that this is not much space on this board.
It's all crammed full.
So the introduction of the chip shi, sca, scale package or chip
size package is really what enabled a lot of our portable products.
Because it allowed us, to package the die in something almost the
same size as the die and to crack, cram it all on
that board.
And, you know, so this, this really is the, the
era of the chip scale package that we're in, in today.
Now, another thing about these portable products, did
you notice how thin that Apple iPhone five was?
Amazingly thin.
What's thin is in.
So everybody wants to make their product thinner, smaller,
but they still want a lot of function in it.
So the only way to do
that is to have a low z-height in it. So if you'll notice, iPhone has the record
now for the thinnest product. iPad is, is, two is pretty thin also.
But this, this is really enabled by a lot of things called wafer level packages
in it and a lot of the chip scale packages that are very thin, low profile.
So that's really what, kind of what's driving a lot of our packaging trends.
Now we made
this chart and put together all the different chips size
packages, and you'll notice that there's a lot of different constructions.
We can have a lot of different type substrates.
maybe a flex circuit, a rigid substrate.
It could be mostly laminate, but you could have some lead frame types, as well.
A lot of different structures, but they're all
called chip-sized packages, and that's what you'll find.
You'll find a lot of these different products on that
mobile phone board.
And basically used to package a lot of different
devices whether it's Flash, ASICs,
Controllers, DSP, Processors Analog Devices.
Many of the analog devices.
And in the ultimate chip scale package would be a
wafer level package which is basically what we call a WLP.
And those are basically the same size as the dye itself, just with bumps on it.
So that is
a very, very, the lowest profile package you can possibly get.
So every iPhone that's come out has had a few more of this
type package in it because it's such the low profile and very small package.
And we expect that trend to continue.
This as you can see is very low profile because there is no package around it.
This is the package itself.
The die and the package are the same.
So all we've done is basically taken a piece
of silicon and we've put solder balls on that.
And then we've attached that to the board.
So you can see that this obviously is much thinner
than anything that has a substrate on it in a package.
And obviously, if you use the flex circuit piece it can be fairly thin.
But this would be the ultimate
with no substrate at all.
So, if you want a really, really thin product you
really have to have something that is almost package less.
But we're, we're, we're still having a ability to
all those bump fabrication in the form of wafer-level package.
So, this is an example of one of these lead frame type packages you'll see
that they're pads not balls on it but it's still called a chip skill package.
it's a very, very small package though and it can be fairly thin as well.
But let me talk a little bit more about these wafer-level packages or WLP.
This is a, basically they could be up to, they might be
up to as large or eight millimeters or nine millimeters on a side.
we've seem some up to 400 hundred IOs,
They're very s- use a very small bump diameter.
Small bump, high package could
be down to maybe, you know point three millimeters.
And we've seen everything from 150 millimeters wafers
to 200 millimeter wafers, to 300 millimeter wafers.
A lot of stuff is. On 300 millimeter wafers.
But we have increasing demand right now for 200 millimeter
wafers because a lot of analog parts are fabricated on this.
And it's an increasing number of analog devices being packaged this way.
This is what one of these things looks like.
This happens to be an International Rectifier part, so you can see
that it's only a one point five by one point five millimeter part.
These are the solder bumps that are formed on the top of it.
And then that, that is the entire package of construction like that.
TI has made a lot of these little parts here, you
can see that, you know, typically there's not many on them.
not many balls on them. Say there's two, four, six, eight on this.
But you also have some
examples that are up to 308 or 309 balls.
This is an example of the power management device from Fujitsu.
And
[COUGH]
this is one of the highest ones that we've
seen but these are down at point four millimeters pitch.
We are seeing things done at point three millimeter pitch in the future
so these balls are getting tighter and tighter, the distance between them all is.
And basically these are used for a lot of different type of devices.
analog devices, the power management as I mentioned,
rf wireless LAN, integrated passive devices, LED drivers,
sound chips, all these things that you find in phones.
So you, this is really, the phone is really the highest volume driver for this.
as I mentioned you'll probably see about nine in the,
nine or so in the last, latest phone from Apple.
digital cameras and camcorders have em.
MP3 players like iPods have em.
Portal navigation systems, watch modules, laptop and tablets.
medical
and automotive are even lookin at this package, so we're going to see
a lot more of this and obviously, it's a very small package.
So, let me say a little bit about the 3D structure and where we
are going with that before we go into some of the more exotic things.
There are, I have some samples with me today of 3D packages.
these are basically they could be, they are stacked-up die.
This is actually a stacked die with wire bonds.
This is from Samsung,
this is probably flash memory You can also, this is an edge
connection for Irvine sensors on a, a, on a stacking theme here.
This is vertical circuits.
You could see the edge connection here.
And a company in France called 3D plus with all kinds of cubes and
I have a sample of those where they're all stacked up, metallized on the side.
And they basically used in a lot of space applications, military applications,
a very interesting technology.
And then we have also a type of package where we can stack
die inside the package and then stack the packages on top of each other.
And that's called a package-on-package, a PoP.
So basically, there's a lot of ways you can go 3D.
And still be in some kind of package.
some of the thinnest packages in this type of category
would be a stacked die CSP where we have wire bonds.
You can see here these nice nice wire bonds here.
Doesn't that look like it'd be fun to assemble?
The die are very thin.
And they're stacked inside the package, typically two or more per die.
Die per package.
And they're done by either the semiconductor maker or the subcontractor,
like an Amcor, or an AFC or Spill or Statschip pack.
Wire bond is most common, but we see a lot
of increased use of flip chip especially on this bottom die.
You might have a flip chip bump here.
The substrate is typically flex circuit or laminate.
Mostly laminate.
A little bit of flex circuit, still, but basically, it takes
a, a very specific process to fabricate this on the wire bond.
There's basically, you have a bond that goes
you'll do a, a down bond, and down and
back, so it's a special process for, for doing this
that people had to develop, in order to do this stacking.
Okay this is the now most of that I showed you was all memory.
But people also were doing a lot of stacking of logic and memory.
This is one of the early OMAP processers
and an SDRAM stacked together with wire bond.
Now the intersting about this is this was developed for Nokia's phones.
And it
en, enabled the thinnest possible package by doing this very
good electrical performance, but the problem was that TI makes processors.
They don't make memory any more, they got out of that business a long time ago.
But, they had to go buy the memory. Memory is a commodity.
It changes prices.
So one day they might be paying $5 for the memory.
By the time they assemble this and got this
to market, the memory might be worth only $2.
So somebody had to eat $3 worth of margin.
So, even though this was the most elegant solution, the lowest profile, maybe
the best electrical performance, this became a
business nightmare, because of the margin involved.
And so, this package actually was replaced by what we call the package-on-package.
This is where individual die are stacked. It could be this top typically is memory.
It could be one
memory or it could be multiple stacked memory
But that would be done by the memory supplier.
And then, typically, this bottom package would be the lo, logic package.
And that would be each individually packages and tested.
And the nose would be typically shipped to
be assembled at board-level assembly for a product.
Now there are some cases like Samsung where they stack them internally
before they ship them for board-level assembly.
But typically, these things almost every smart phone almost every
tablet will have one of these things in it, at least.
A lot of cameras as well.
A lot of infrastructure was required to develop it.
If you look at this you go, well gosh, that's a lot
thicker, and you just told me that everybody wants a thin product.
Yes, but the business reasons for doing
this, trumped the technology reasons for doing it
the other way.
And that's really the takeaway from some of the things I'm going to talk.
Every time there's a technology solution, you have to also make
sure it also makes sense from the business standpoint as well.
So even though this has, costs more, more substrates in here.
Because you pretest everything. You throw away less of 'em.
You have the business problems of who's got the margin covered salt.
So this has been a very, very, very popular package.
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