Okay, so that is what a RAT looks like.
It's a table where, for each architectural register, for example, for R0,
it will say where we keep R0 currently. Then for R1, there is another entry and
so on. So this table really just stores where things are. This is just for
our convenience. You know, we kind of numbered the entries, but
basically doesn't need to store this zero here,
it's simply that the entry number 0 is for our 0, the entry number 1 is for
our 1, etc. So now we will have some instructions. Let's first look at
this first instruction. So let's say the processor is fetching this instruction.
What it does is for all the registers that this instruction needs to read,
it looks in the RAT where those registers can currently be found.
Let's say that for R2, this is just saying P2 for now.
So this is physical register 2, which correspond to R2 initially.
And let's say that it's P3 here. In fact, let's say all them are just like this.
So what the processor does is it renames this instruction, so it fetches it,
decodes it, and then rewrites it so that the actual operation that will be
done is going to be on physical register speed two and P3.
And now the question is where are we going to put our result? Well,
we're going to put our result in a new place for R1, so not in P1.
So we will change the RAT to put the result in some P17 or
whatever, okay? So now we're going to say that this is, this all goes to P17,
and then we're going to use P23 for the inputs. Let's say that
the next instruction is subtract R1 and R5 and put the result in R4.
What the processor again will do is, so it always follows the same procedure.
Look at the RAT for R1 and R5 to see where those values currently are, and
then rename them. So we're going to look at R1, and it says P17.
So this subtract is renamed into read P17, and P5, and
put the result into a new place for R4. So
we're going to change the RAT from now on, to put the result in, let's say, P18.
Okay so, I'll evaluate three more instructions and now we can rename them too.
So this XOR will be renamed into an XOR of R7 and R8. Where are they?
Well, let's say they're in P7 and P8. And then we're going to write to R6.
We're not going to write to P5. That's, where the previous value of, R6 is.
We're going to write it to a new register P19. Then we're going to take this
multiply and remember you need to update the RAT every time you produce a new
value, because that's where subsequent instructions will find the value for
that register. So we're going to, again, R8 and R9, still no change. So
they're going to be P8 and P9. The new value for R5 is going to go to P20.
And then we have this ADD R8 and R9 are still in P8 and P9.
The new value for R4 is now going to be P21. Now,
this is an already renamed value, so we're going to rename it again and say P21.
Later on, if there is an instruction that uses R4, so something something R4,
it's going to be renamed into whatever, P21. So the trick here is that,
we have seen that this instruction writes to R4, and this one also writes to R4.
So there is a register name dependence between these two because they're both
trying to write to R4, but when we rename them this way, the dependency's gone,
because this is producing P18, this is producing P21. Instructions among these
that need to write the value, so basically, if something here was reading R4,
it would get the value P18 instead because it's been, it,
it would be renamed to read P18. Anything that follows this instruction,
that wants to read R4 would be renamed so that it reads the P21. So
simply, the use of R4 as a name for the value produced by this instruction and
also for the value that's produced by this instruction is what was causing, for
example, the write after write dependence. We eliminated dependence because here
the name will be different. This value is going to be named P18.
This one will be P21. There is no more dependence.