Hi, in this short video we're going to review the 86108A and B Option JSA, which is jitter
spectrum analysis and software clock recovery emulation. And this feature provides more
accurate jitter measurements together with greater insight into root causes for jitter.
We're going to start by just reviewing some quick basics on clock recovery and some of
the nomenclature that we'll be using and then look at Option JSA; what does it do, how does
it do it, and then give you a quick demo on how to use Option JSA. So clock recovery basics,
clock recovery is obviously used to recover a clock from a incoming data signal. But it's
also very important in managing jitter within a system. And standards specify clock recovery
definitions based on their loop order, bandwidth, and peaking or damping factor. So here's a
block diagram of a clock recovery circuit. Input signal comes in on the left-hand side.
And then what comes out is a recovered clock, which depending on the loop bandwidth of your
clock recovery circuit, may have a little bit of jitter or quite a bit of jitter on
your recovered clock. How much jitter is determined by the jitter transfer function which is the
low pass function here shown in dark blue. It's an indication of how much jitter will
be transferred from the input signal onto the recovered clock which is the output signal.
So it's jitter out over jitter in. But real receivers and oscilloscopes use that recovered
clock as a reference signal in order to analyze the incoming signal. So if you have a very
clean clock and you're looking at your input signal, you're going to observe all of the
incoming jitter that's on that signal. But if you've allowed some of your jitter to appear
on your recovered clock, then the recovered clock and your data are going to be moving
in sync. And you're going to observe a lot less jitter on your oscilloscope or your receiver
is going to have a much easier time of determining ones or zeros. We call it the observe jitter
transfer function because that is what your receiver or what the oscilloscope is actually
going to observe in terms of jitter. So it's really important that you know when you're
working with a particular standard whether the standard is talking about the 3 dB bandwidth
of the low pass function. What we're referring to here as the jitter transfer function, or
whether it's the 3 dB bandwidth of the high pass function, which we are calling the OJTF.
DCA's hardware clock recovery sets the loop bandwidth of the low pass function, the JTF
function. Some of the new standards such as SATA and SAS and some oscilloscopes such as
the Agilent real-time oscilloscopes define the loop bandwidth in terms of the OJTF. And
so for accurate measurements for making apples to apples measurements, you really need to
know when you are configuring your clock recovery circuit whether you're setting up the JTF
or the observe JTF. So let's have a look at what Option JSA does. First thing it does
is it allows the DCA to improve its jitter measurement accuracy. Any design implemented
in hardware will have limitations and some non-ideal behavior. Option JSA characterizes
the hardware clock recovery response and allows the DCA to emulate an ideal or software clock
recovery response. Option JSA also improves insight into jitter. It provides jitter magnitude
versus frequency plots which helps designers isolate jitter problems more quickly. For
example, you'd be able to determine whether an increase in jitter was due to low frequency
jitter, which is typically going to be generated by the phase noise from your reference clock.
And it also makes it a lot easier to configure and set up your clock recovery, as you'll
see shortly in the demo. So how does the DCA use Option JSA? Well, here's a block diagram
of the 86108A and B module. Data comes in here on the left-hand side. There's a
pickoff or a tap and the small amount of the signal is routed down into the clock recovery
circuit, which is shown in the bottom. And most of the signal is sent directly to the
channel 1 and 2 sampler which is the 50 gigahertz sampler in the case of the 108B Option HBW.
The first thing that happens when JSA is enabled is a step generator is launched into the clock
recovery circuit and we characterize our own clock recovery. And so we very accurately
know under the operating conditions that the user has set up, we know what the JTF and
what the OJTF looks like. The next thing that happens is jitter mode measurement is performed.
So the classic jitter mode measurement is made using the reference clock from the recovered
signal. And you can see here that it's coming into the sampler, and we're analyzing the
incoming data. But at the same time, there's a 12 bit ADC that is making a measurement
on the error signal that's in the clock recovery loop. And then we digitize that signal and
process it in order to be able to look at the low frequency jitter. So it's important
to note here that the reference clock that's coming into the phase detector and the data
that's being analyzed is the same as the reference clock and the data that's being analyzed by
the traditional 50 gigahertz high bandwidth sampler. So we're measuring the same thing
using two different acquisition systems, the input spectrum as measured by the ADC as a
subset of the measurement that is being performed by jitter mode. The next thing is to calculate
what was the input signal that had to be present in order to generate this measured spectrum
that we made in 2A. So because we know what the input and response was of our clock recovery
circuit, we know what it measured, we can then determine what was the jitter spectrum
coming into the module directly out of the device. Knowing that, we can then apply an
ideal PLL and then determine what is the jitter spectrum if we were to use an ideal PLL. If
the ideal clock recovery and the hardware clock recovery are exactly the same, then
the measurements made in 2A and the jitter spectrum in 4 will be exactly the same. If
there are small differences, then we'll be able to measure those differences and characterize
them. The final step is to calculate what is the difference between the hardware measured
jitter spectrum and the jitter spectrum when using the ideal software clock recovery.
And then we can optimize the jitter mode result and get a more accurate jitter mode measurement.
So here's an example of that shown in the green trace is the jitter spectrum of an incoming
signal. And shown in the pink trace is the observed jitter transfer function of our hardware
clock recovery. Measuring with jitter mode our random jitter is just over 300 femtoseconds.
And our total jitter is 6.4 picoseconds. So in this case, our hardware clock recovery
may have more peaking than we really want in our measurement. So by applying an ideal
software clock recovery, then we can emulate different types of models. And for example
here, we might want an observed jitter transfer function that has less peaking. And in doing
so and applying the jitter optimization capability, our random jitter is now just under 250 femtoseconds.
So we have a more accurate RJ measurement which is then used to calculate a more accurate
total jitter measurement. 50 femtoseconds might not seem like a lot, but at 28 gigabits
per second for CEI 28 gig VSR, for example, that's more than 10 percent of the RJ budget.
Let's do a quick demo on how to use JSA. So I'm going to do a default setup. And we've
got a 10 gig signal coming in, a differential signal. So I'm going to come down here to
the bottom left-hand corner and set up a differential signal. This particular module that we're
using has a maximum bandwidth of 35 gigahertz. And I'm going to then come to the next tab,
set up a clock recovery, 10 gigabits per second, lock up my hardware clock recovery. Now I
can, at this point, set up my target loop bandwidth if I want in hardware, but I'm not
going to do that at this point in time. And I'm going to enable my precision timebase.
So three steps: set up your channel, set up your clock recovery, and enable your precision
timebase. So I'm interested in making a jitter mode measurement. So I'm going to come to
jitter mode and enable JSA. I'm going to display the JSA spectrum. And I'm going to configure
the ideal PLL. So here's the ideal PLL setup. I can set up a first, second, or third-order
PLL. I'm going to set up a second-order with four meg loop bandwidth. And let's say that
there's going to be 0.1 dB of peaking in my JTF. If I have a definition for the OJTF,
I can click this button and set up the bandwidth and damping factor. Once I've done that, I
really want to optimize my hardware to very closely match what I'd like the software to
emulate. So this minimizes the difference or the correction that has to take place.
So I click the optimize CDR setup, and then it optimizes my hardware automatically for me.
And you'll look at the JSA spectrum and the waveform at the same time and press auto scale.
So here's my eye diagram. I'm going to make a traditional jitter mode measurement
which is going to be performed in the crossing region. And again, jitter mode targets most
of its samples – more than 99 percent of its samples in this crossing region in order
to become very fast and very efficient at gathering data. At the same time, we have
that ADC that's measuring the error signal out of the phase detector, and we're digitized
that we're doing an FFT of that. And we're displaying that information. And so the JSA
results are related to the jitter spectrum. And the jitter results are also available.
Notice that we can do some averaging on the JSA. So this is like video averaging in a
spectrum analyzer, it lowers the jitter floor of our JSA measurement allowing us to get
a more accurate random jitter measurement. So it takes a little bit longer than the traditional
measurement in jitter mode, because you have to wait for this averaging to take place.
Because of JSA, we get a more accurate measurement. So we come over to the jitter result. RJ is
being measured at 309 femtoseconds. This is the hardware clock recovery. Now when I come
in and I turn on jitter optimization, turn this button on, it's characterizing the loop
response which is injecting that step. And now you can see that my random jitter is 280
femtoseconds instead of, if I turn off jitter optimization, it's 311. In this case, it's
dropped by almost 30 femtoseconds. This is the difference between the hardware clock
recovery setup and what I've asked JSA to emulate in software. JSA also allows me to
perform integrated jitter measurements. And so I can have start and stop frequencies which
I can change in the JSA setup dialogue. Or if I'm using a mouse, I can just adjust the
limits using the thumb wheel on my mouse. And the results shown here in the bottom left-hand
corner of the JSA results tab are the integrated jitter measurements within the start and stop
frequencies of the JSA display. So I'm looking at the measured jitter spectrum which is the
jitter spectrum directly out of the hardware clock recovery. Here's my device. Here's the
DCA and the module. Here's my hardware clock recovery, my ADC, which I'm doing an FFT on.
I'm now looking at that spectrum. But I can also look at the spectrum after my software
clock recovery. So now you can view and analyze the signal as measured by your ideal PLL.
These start and stop limits do not affect the jitter results when you turn on and off
jitter optimization. They only influence the results on the JSA results tab. So this is
giving you a quick overview of the JSA Option on the 86108A and B precision waveform analyzer.
For more information, please refer to www.agilent.com/find/86108B.
Thanks very much.