Symmetric multiprocessing involves a symmetric multiprocessor system hardware
and software architecture where two or more identical processors connect to a
single, shared main memory, have full access to all I/O devices, and are
controlled by a single operating system instance that treats all processors
equally, reserving none for special purposes. Most multiprocessor systems
today use an SMP architecture. In the case of multi-core processors, the SMP
architecture applies to the cores, treating them as separate processors.
SMP systems are tightly coupled multiprocessor systems with a pool of
homogeneous processors running independently, each processor executing
different programs and working on different data and with capability of
sharing common resources and connected using a system bus or a crossbar.
Design SMP systems have centralized shared
memory called main memory operating under a single operating system with two
or more homogeneous processors. Usually each processor has an associated private
high-speed memory known as cache memory to speed up the main memory data access
and to reduce the system bus traffic. Processors may be interconnected using
buses, crossbar switches or on-chip mesh networks. The bottleneck in the
scalability of SMP using buses or crossbar switches is the bandwidth and
power consumption of the interconnect among the various processors, the
memory, and the disk arrays. Mesh architectures avoid these bottlenecks,
and provide nearly linear scalability to much higher processor counts at the
sacrifice of programmability: Serious programming challenges remain
with this kind of architecture because it requires two distinct modes of
programming, one for the CPUs themselves and one for the interconnect between the
CPUs. A single programming language would have to be able to not only
partition the workload, but also comprehend the memory locality, which is
severe in a mesh-based architecture. SMP systems allow any processor to work
on any task no matter where the data for that task are located in memory,
provided that each task in the system is not in execution on two or more
processors at the same time; with proper operating system support, SMP systems
can easily move tasks between processors to balance the workload efficiently.
History The earliest production system with
multiple identical processors was the Burroughs B5000 which was functional in
around 1961. However at run-time this was asymmetric, with one processor
restricted to application programs while the other mainly handled the operating
system and hardware interrupts. IBM offered dual-processor computer
systems based on its System/360 model 65 and the closely related model 67. and
67-2 The operating systems that ran on these machines were OS/360 M65MP and
TSS/360. Other software developed at universities, notably the Michigan
Terminal System, used both CPUs. Both processors could access data channels
and initiate I/O. In OS/360 M65MP, since the operating system kernel ran on both
processors and peripherals could generally be attached to either
processor. The MTS supervisor ran on either or both CPUs of the IBM
System/360 model 67-2. Supervisor locks were small and were used to protect
individual common data structures that might be accessed simultaneously from
either CPU. Digital Equipment Corporation's first
multi-processor VAX system, the VAX-11/782, was asymmetric, but later
VAX multiprocessor systems were SMP. The first commercial Unix SMP implementation
was the NUMA based Honeywell Information Systems Italy XPS-100 designed by Dan
Gielan of VAST Corporation in 1985. Its design supported up to 14 processors
although due to electrical limitations the largest marketed version was a dual
processor system. The operating system was derived and ported by VAST
Corporation from AT&T 3B20 Unix SysVr3 code used internally within AT&T.
Uses Time-sharing and server systems can
often use SMP without changes to applications, as they may have multiple
processes running in parallel, and a system with more than one process
running can run different processes on different processors.
On personal computers, SMP is less useful for applications that have not
been modified. If the system rarely runs more than one process at a time, SMP is
useful only for applications that have been modified for multithreaded
processing. Custom-programmed software can be written or modified to use
multiple threads, so that it can make use of multiple processors. However,
most consumer products such as word processors and computer games are
written in such a manner that they cannot gain large benefits from
concurrent systems. For games this is usually because writing a program to
increase performance on SMP systems can produce a performance loss on
uniprocessor systems. Multithreaded programs can also be used
in time-sharing and server systems that support multithreading, allowing them to
make more use of multiple processors. Programming
Uniprocessor and SMP systems require different programming methods to achieve
maximum performance. Programs running on SMP systems may experience a performance
increase even when they have been written for uniprocessor systems. This
is because hardware interrupts that usually suspend program execution while
the kernel handles them can execute on an idle processor instead. The effect in
most applications is not so much a performance increase as the appearance
that the program is running much more smoothly. Some applications,
particularly compilers and some distributed computing projects, run
faster by a factor of the number of additional processors.
Systems programmers must build support for SMP into the operating system:
otherwise, the additional processors remain idle and the system functions as
a uniprocessor system. SMP systems can also lead to more
complexity regarding instruction sets. A homogeneous processor system typically
requires extra registers for "special instructions" such as SIMD, while a
heterogeneous system can implement different types of hardware for
different instructions/uses. Performance
When more than one program executes at the same time, an SMP system has
considerably better performance than a uni-processor, because different
programs can run on different CPUs simultaneously.
In cases where an SMP environment processes many jobs, administrators
often experience a loss of hardware efficiency. Software programs have been
developed to schedule jobs so that the processor utilization reaches its
maximum potential. Good software packages can achieve this maximum
potential by scheduling each CPU separately, as well as being able to
integrate multiple SMP machines and clusters.
Access to RAM is serialized; this and cache coherency issues causes
performance to lag slightly behind the number of additional processors in the
system. Systems
= Entry-level systems = Before about 2006, entry-level servers
and workstations with two processors dominated the SMP market. With the
introduction of dual-core devices, SMP is found in most new desktop machines
and in many laptop machines. The most popular entry-level SMP systems use the
x86 instruction set architecture and are based on Intel’s Xeon, Pentium D, Core
Duo, and Core 2 Duo based processors or AMD’s Athlon64 X2, Quad FX or Opteron
200 and 2000 series processors. Servers use those processors and other readily
available non-x86 processor choices, including the Sun Microsystems
UltraSPARC, Fujitsu SPARC64 III and later, SGI MIPS, Intel Itanium, Hewlett
Packard PA-RISC, Hewlett-Packard DEC Alpha, IBM POWER and PowerPC processors.
In all cases, these systems are available in uniprocessor versions as
well. Earlier SMP systems used motherboards
that have two or more CPU sockets. More recently, microprocessor manufacturers
introduced CPU devices with two or more processors in one device, for example,
the Itanium, POWER, UltraSPARC, Opteron, Athlon, Core 2, and Xeon all have
multi-core variants. Athlon and Core 2 Duo multiprocessors are
socket-compatible with uniprocessor variants, so an expensive dual socket
motherboard is no longer needed to implement an entry-level SMP machine. It
should also be noted that dual socket Opteron designs are technically ccNUMA
designs, though they can be programmed as SMP for a slight loss in performance.
Software based SMP systems can be created by linking smaller systems
together. An example of this is the software developed by ScaleMP.
With the introduction of ARM Cortex-A9 multi-core SoCs, low-cost symmetric
multiprocessing embedded systems began to flourish in the form of smartphones
and tablet computers with a multi-core processor.
= Mid-level systems = The Burroughs D825 first implemented SMP
in 1962. It was implemented later on other mainframes. Mid-level servers,
using between four and eight processors, can be found using the Intel Xeon MP,
AMD Opteron 800 and 8000 series and the above-mentioned UltraSPARC, SPARC64,
MIPS, Itanium, PA-RISC, Alpha and POWER processors. High-end systems, with
sixteen or more processors, are also available with all of the above
processors. Sequent Computer Systems built large SMP
machines using Intel 80386 processors. Some smaller 80486 systems existed, but
the major x86 SMP market began with the Intel Pentium technology supporting up
to two processors. The Intel Pentium Pro expanded SMP support with up to four
processors natively. Later, the Intel Pentium II, and Intel Pentium III
processors allowed dual CPU systems, except for the respective Celerons. This
was followed by the Intel Pentium II Xeon and Intel Pentium III Xeon
processors, which could be used with up to four processors in a system natively.
In 2001 AMD released their Athlon MP, or MultiProcessor CPU, together with the
760MP motherboard chipset as their first offering in the dual processor
marketplace. Although several much larger systems were built, they were all
limited by the physical memory addressing limitation of 64 GiB. With
the introduction of 64-bit memory addressing on the AMD64 Opteron in 2003
and Intel 64 Xeon in 2005, systems are able to address much larger amounts of
memory; their addressable limitation of 16 EiB is not expected to be reached in
the foreseeable future. Alternatives
SMP using a single shared system bus represents one of the earliest styles of
multiprocessor machine architectures, typically used for building smaller
computers with up to 8 processors. Larger computer systems might use newer
architectures such as NUMA, which dedicates different memory banks to
different processors. In a NUMA architecture, processors may access
local memory quickly and remote memory more slowly. This can dramatically
improve memory throughput as long as the data are localized to specific
processes. On the downside, NUMA makes the cost of moving data from one
processor to another, as in workload balancing, more expensive. The benefits
of NUMA are limited to particular workloads, notably on servers where the
data are often associated strongly with certain tasks or users.
Finally, there is computer clustered multiprocessing, in which not all memory
is available to all processors. Clustering techniques are used fairly
extensively to build very large supercomputers.
See also Asymmetric multiprocessing
Binary Modular Dataflow Machine Locale
Massively parallel Non-Uniform Memory Access
Sequent Computer Systems Simultaneous multithreading, where
functional elements of a CPU core are allocated across multiple threads of
execution. Software lockout
Xeon Phi References
External links History of Multi-Processing
Practical Parallel Programming in Pascal Linux and Multiprocessing
Multicore News blog AMD