welcome to the HDL coder video series in this video series we will learn a
popular production proven path to take a MATLAB digital signal processing
algorithm through similan fixed point designer and HDL coder to target an FPGA
in the first part of the video series we will discuss a strength of MATLAB and
Simulink and provide an overview of the HDL coder self guided tutorial available
on the math works file exchange HDL coder generates synthesizable VHDL or
Verilog from MATLAB functions similan models and state flowcharts that can be
used to target FPGA or ASIC hardware MATLAB is a high-level language an
interactive environment a complex mathematical operations can be easily
performed on large sets of data this ability of MATLAB makes it an ideal tool
to develop digital signal processing algorithms to target such a powerful
language onto Hardware we need to understand that the FPGA hardware is a
fixed set of resource the FPGA hardware has limited bandwidth of resources
consisting of input/output blocks memory and DSP slices which must be effectively
used to achieve an optimized design architecture while achieving the desired
outcome as resources are fixed in Hardware to perform operations on large
datasets we will work on stream of bits while coordinating the timing to obtain
the right answer simile provides an environment where you can describe how
the algorithm design will work with a stream of data and simulate before
moving to Hardware implementation similan has a built-in sense of time and
aids in visualizing the data types and sizes propagation through operations
which are key to creating a good hardware architecture similan has an HDL
optimized library with more than 250 blocks and compatible with HDL code
generation thus to deploy matlab algorithm on an FPGA the recommended
workflow is to use MATLAB and Simulink together to combine textual and
graphical programming in a simulation environment we will use the MATLAB
algorithm as a golden reference describe Li hardware
architecture in Simulink convert to fixed point and utilize similes
visualization to optimize the generated HDL code thus each step in Simulink can
be verified in MATLAB and utilizes MATLAB as a test and visualisation
environment to illustrate the workflow we will utilize the HDL code a
self-guided tutorial example from the math works file exchange website the
tutorial comes with a visual guide and provides step-by-step instruction to
implement a matlab algorithm onto a FPGA in addition the tutorial provides the
necessary MATLAB and test bench scripts in the MATLAB reference script the pulse
to detect is created and is inserted in a transmitted signal noise is added to
represent a real-world receive signal to detect the pulse in MATLAB we will
utilize the entire frame of the receive signal and pass it through a match
filter with decide coefficients this algorithm will be our MATLAB golden
reference which will detect the peak value and its location hardware works on
a continuous stream of bits and beat detection is obtained by sliding a
window over a sample of the bit stream to ensure this method gives us the
desired result we create a matlab algorithm which represents the hardware
implementation this we will call as the hardware friendly algorithm the hardware
implementation algorithm detects the peak within a sliding window of the last
11 samples under the criteria the middle sample is the largest and the middle
sample is greater than a predetermined threshold this algorithm will be
utilized to verify and compare the output of the Simulink model
implementation in the first part of this video series on the HDL coder we have
discussed the strengths of MATLAB and Simulink environment and provided an
overview of the pulses into MATLAB algorithm which will be used to
highlight the HDL code a workflow required to implement a MATLAB algorithm
on an FPGA the next video we will design the Simulink implementation of the pulse
detector algorithm and compare it to the MATLAB golden reference