Hello folks!
In the last few videos I have talked about why we need FinFET devices.
How they help us to improve our
subthreshold slope, how they allow scaling of
the gate length again, how they have
better electrostatics and so on and so forth.
What I want to do, in this video and the
next, few videos is to talk a little bit about
the process steps, or the nano manufacturing steps
that go into making of this FinFET, device.
Many of them are similar to what you have in a planar device so most of your back
end of the line flow does not change much
whether you have a FinFET, or a planar device.
Most of your changes are located in this front
end of the line flow, and I'll highlight those in these next set of videos.
But before I get to it, a very important point I
want to emphasize is that a FinFET is a 3D device.
So you need a good 3D model, or a 3D Cross sections to look
at it, and it's it's always important when you're looking at T in picture or images
of, of FinFET device, to look at, at least
two cross sections, so for example this is your Fin.
It's important to take a cross section which is parallel to your fin.
So in this case, your fin is in this
direction so, it's important to look at this cross section.
And, it's also important to look at a
cross section which is perpendicular to the fin.
So if your fin is this Is in this direction this
is a cross section which is perpendicular to the fin.
So if you look at a cross section which is
parallel to the fin, this is how it would, look like.
So you will see your, source, and this
will be your fin running around this direction.
You have, current conduction both on the side of the fin.
You also have current conduction on the top of the fin.
And this is your drain and this is your gate wrapping around
your Fin.
So if you look at the parallel cross section,
many times it doesn't look like a 3D device.
So if you look at this cross section, this looks very
similar to what you see in a planar device, so it's
also important to look at this cross section, which is perpendicular
to your device, so if you look at that cross section.
Then you see that okay this is my fin over here, and this is my
gate which is wrapping around my fin device.
So it's important to wrap your head around this idea that
you need to look at least at both parallel, and perpendicular cross section.
If you want to have, a clear understanding of, this
device. So, so first thing in in making
the FinFET is to form the Fin itself. So, let's start by looking
at the different approaches we can start we can make a Fin for a FinFET device.
So the, the most common approach are, the most prevalent approach is to use, what is
called a Substractive Fin or to also we can say, is to etch a fin into
your silicon..
So here's a sample process flow, depicting how this might happen.
So you start with the silicon substrate in this
case, and then you have a nitride hard mask.
And so far, you have a nitride capping layer over
here, and then you have a amorphous silicon hard mask and
as we discussed you nowadays, almost everybody uses a double patterning.
And the preferred double patterning approach for making patterning for
making this fins, is a self align double patterning approach.
And using that essentially you define mandrel over here, and you
have these spacers, and then you remove this mandrel, and
you are left with this spacer which are twice the density, or half the pitch.
And then you etch those spacers into these hard mask.
And you are left with this hard mask Which you can now etch into your silicon.
So what you do with this is you use this hard mask and you etch this
pattern in to your silicon wafer and you form these silicon fins.
So here you have formed these silicon fins.
And the next step is you can remove this hard masks so you no
longer use, no longer need it so you can etch away this hard mask.
You're still left with this silicon nitride cap
on the top. So, at this point of time, we can decide
whether we want to keep this silicon nitride hard mask.
If we keep it, we don't use this top surface for a
current conduction, and we are left with what is more commonly known
as a FinFET, or a double gate device. If we decide to remove
this hard mask, then we use this our top surface
in in adjacency with these side walls for current
conduction and it's more commonly known as the trigate
device, or the 3d transistors, as Intel likes to call them.
So we can, make that decision at,
this point whether we want to keep the silica nitride, or, not.
in either case the next step is to essentially fill out the, this,
these trenches which were created over here So which were
created over here and we fill it up all with an oxide and this has
to be, this oxide has to be conformal enough so
that it fills up fills up all these trenches and depending upon
the aspect ratio of the trenches you might require either a very conformal or a.
You know, a very conformal requirement on this fill.
And, essentially when you fill it up with oxide, the
next step you do is you do a CMP, so you
come with CMP and you try to
planarize this surface. So you try to planarize it, and what you
are left with is, both CMP. You'r left, with this
planarized surface after CMP. And the next
step which you do is to is to etch
back this oxide.
So, you etch this oxide back, and that essentially
reveals the fin, so you etch this oxide back and
depending upon how, how deep you etch, you essentially
define how, what is the height of your FinFet device.
So, depending upon how deep I etch, that determines the height of my FinFet device.
The width of my FinFet device was
determined by this patterning step
So the width of my FinFET device was defined at this step.
So the width of my FinFET device was essentially the width of this spacer.
and so the width of my device is determined by the spacer,
and this height is determined, by the a etch back of this oxide.
So those are the 2 critical dimensions that we need to keep
track of, and this is how they are defined in in a subtractive.
Fin process.
So this is not the only process, that you can have to make a FinFET device.
So, I'm showing here another process, which is a replacement Fin process.
Or you could also call it a, a damascene kind of a
process, where you have a mold, and you use that mold to define your, fin.
So again the process flow to start with is, that
you have your hard mask, you have, a nitride layer.
In this case you have a thicker nitride layer, so this, thickness of this, nitride
layer is, is, Is more thicker, as compared to the subtractive finflow.
And what you do essentially, is again you have you start with
the SADP and you have your mandrel, and you have your.
You have your spacer, and then you remove your mandrel away.
And what you are left with, is these spacer.
The width of these spacers, again define the width of my of my
resulting FinFET.
So what I do in this case, is, again,
I etch this, nitride spacer, into my, hard mask.
And then, I etch that pattern into my silicon nitride.
Because I have this, thick layer of silicone nitrite.
I can very selectively etch this, pattern into, my, silicon nitride
And what I am, left with is these silicon
nitride fins standing
over here. And then again, I don't need my hard mask,
so I can remove it. And then, I again use a fill, to
STi fill to fill this these are trenches between the nitride.
So I fill them up with this oxide layer. And then again, I CMP it off.
So I remove this portion.
And what I'm left with again, this nice
planer feature which has multiple of these nitride fins.
And the way I proceed from here, is then I use etch.
So, then I use the etch, which is
selective between my nitride and my oxide film,
and I selectively remove the nitride, so I remove this nitride out from this spacer.
And then what I'm left with is a mold
like this so I removed the nitride from, here.
And what I'm left with essentially is a mold.
A dielectric mold, made of this silicon oxide.
And what I do next is to grow silicon.
So I can grow
whatever the material I want into for making my fins, into this mold.
So I can do a silicon or a, epitaxy of a silicon
into this mold, and then I, fill up this mold with
silicon so I am left with silicon fins which are grown by
epitaxy, and then the next thing I can do, is etch back and
reveal these fins, etch back this oxide and
i reveal this fins. So again, the height
of my FinFET device, is determined by how
deep, I etch back and the width again is determined by this mold which was determined by the nitride layer which was in,
in, you know, essentially is determined by the width of the spacer.
But these are two different approaches we can
use to make these fins pattern these fins.
And this replacement fin approach is, is more suitable.
Especially, when you are trying to grow a different material.
So, you might have a silicon substrate but suppose
you want to grow a fin from a material which is non silicon.
So you want to make your fin of let's say,
silicon germanium, or germanium, or A 3 5 material.
So that case our replacement fill approach is more favorable.
Because, it can trap these defects into this high aspect ratio structure.
So this has a high,
aspect ratio structure.
And then you can leverage, this process called a
aspect ratio trapping, to trap your defects in this mold.
Shown here, is one example of this replacement of fin approach, and being
used to make a fin, of a different channel materials, such as germanium or 3 5.
In this case, they are.
Making a fin of indium phosphide, which has a lattice
constant of 5.9 angstrom, and it's grown on a silicon substrate,
which has a lattice constant of 5.4 angstrom.
So there's a 10% lattice mismatch between these 2 fins.
And there'll be of course defects created So they will use this
approach called aspect ratio trapping, or ARTR.
and this replacement fin flow to kind of capture these defects.
So, I'm I'm using this cartoon to demonstrate this process flow,
and it uses this replacement Fin process flow that we just talked about.
So they start with this mold.
So they have this oxide film grown on the silicon.
And they pattern it, and create this mold into which you do your epitaxy.
And you start by doing your epitaxy so you
do, grow a germanium first, which has you know kind
of a lattice constant in between indium phosphide, and silicon,
and then you grow this indium phosphide Fin over here.
The point I want to emphasize, is that there'll
be a lot of defects which will be created.
So when you do this epitaxy, you'll be having a lot of these stacking
fault, and other crystalline defects which will be created.
But since this is a narrow mold, since this is a narrow mold with a high,
aspect ratio, most of your defects, are captured within this mold.
So that's why the name aspect ratio trapping, because if you have this
high aspect ratio mold, it captures most of these defects within this mold,
and your resulting film towards the top is defect free.
So you use this approach to to make these Indium Phosphide, or
a 3 5 fin and you in this case, have overgrown it slightly,
and you have this overgrowth, and then you come off with a CMP step.
And you polish this again, and
you are left with this Indium Phospide
fins, which are embedded into your silicon oxide.
And then you can etch back, and reveal this fins to whatever height, you want.