So here is a virtual memory manager and it
is responsible for an address space that it is governing
and this is the guy that is going to worry
about breaking a linear address space into regions and mapping
those regions to specific memory objects. For a particular
process that is living in an address space to access
a particular memory object. Obviously, this memory object has
to be brought into DRAM and that is what a
pager object is going to do. Which is equivalent to the idea of what is called
external pages in other systems, such as Mark.
A pager object is responsible for making or
establishing the connection between virtual memory and physical
memory. And a portion of the virtual memory
that is a region of the linear address
space has been mapped to this memory object,
and it is the responsibility of this pager
object to make sure that this memory object
has the representation in the physical memory when
the process wants to access that portion of
the address space range that corresponds to this
memory object. So this pager object creates what
is called a cached object representation for the
memory object in the DRAM. So now, the portion
of the address piece, that is the region
of the address piece That this virtual memory
manager mapped to this memory object one becomes
available for the process to address in its DRAM
because of the work done by this pager
object in mapping this memory object into this DRAM.
Similarly, a different virtual memory manager object. Managing
a different address space can similarly map another memory
object and clear a cache representation for
this address space to map a region of
its address space to this memory object
using this pager object. I mentioned that the
address space manager can make any number
of such mapping between regions of the linear
address space and memory objects. For instance, there's
another region of the linear address space that
is mapped to this memory object, too, and
there may be a pager object that governs the
paging of this object into a DRAM representation.
So there's a cached object representation for this memory
object which is part of the region Of
the linear address space of a particular process managed
by this VMM1. So in this example, this
pager one is a pager for two distinct memory
objects, memory object one and memory object two, and which
are cached by VMM1 on behalf of a process. So
there are two pager objects. One for each one of
these things. So the important point I want to get
across is that there's not a single paging mechanism that
needs to be used for all the memory objects. So
it gives you an ability to have different regions of
the linear address space of a given process by associating
different pager objects with each of the regions
that correspond to a particular memory object. And
all of these associations between regions and memory
objects can be dynamically created. So for instance, this
address space manager may decide to associate a
region in this linear address space to this memory
object. If it does that, then there is
a new pager object that. Is going to manage their
association between the region of the virtual address
space that is mapped to this memory object
three and the cached object representation is the
DRAM representation of this memory object created by a
pager object that is managing the relationship between
this region. And this particular memory object three. Now
this is an interesting situation, because you have
a memory object that is shared by two different
address spaces. And there are two distinct pager
objects associated with managing The region of the
address space in VMM 1 that maps to this memory object, and the region of the
address space in VMM 2 that maps to the same memory object. Now what about the
coherence of the cache representation of this object
that exists over here? And the cached representation
of this object that exists over here. Who manages
that? Well it's entirely up to the pager object [INAUDIBLE]
instantiated. In order to manage the mapping between this
memory object and the cached object. So if coherence is
needed. For the cache representation of this memory object
in the DRAM of this address space and this address
space, then it is a responsibility of these two
pager objects to coordinate that. So it's not something that
string system is responsible for, but it
provides the basic mechanisms through which these
entities can manage the regions that they
are mapping. In terms of the memory objects
and the DRAM representation of those objects.
So in other words, external pagers establish
the mapping between virtual memory, which is
indicated by these memory objects, and physical memory,
which is represented by the cached objects. So
in summary, the way memory management works in the
spring system is, the address space managers. Are
responsible for managing the linear address space of a
process, and they do the mapping of the
linear address space of a process by carving them
up into regions. And associating the regions with different
memory objects, and these memory objects maybe swap space
on the disk. Or it could be files that
are being mapped into specific regions of the linear
address space. Entirely up to the application, what they
want to do with it, but these abstractions are powerful
for facilitating whatever may be the intent of the
user. And mapping the memory objects to the cache representation,
which lives in DRAM, is the responsibility of pager
objects. And you can have any number of external pages
that manage this mapping. And in particular, through this example I've shown you
that you can have, for a single
linear address space, multiple pager objects that
are managing different regions of that same
address space. And that's the flexibility and
power that's available in the structure, of
the spring system, using the object technology.