Hello folks.
So what I will do in this video, is to talk a little bit about this multi
level cell, or also known as the MLC.
And let's start by looking at this press release from SanDisk and it says
that SanDisk is announcing a 19 nanometer memory flash chip.
It will have
a capacity of 64 gigabit or 8 gigabyte per die.
And it also says that it will be having 2-bit-per-cell or x2.
So what is this 2-bit-per cell or x2?
So many times you see in these press
releases that They'll announce a chip and then they'll
say it's x2, or 2 bits per cell. Or x3, or 3 bits per cell.
Or x4, 4 bit per cell.
So, what does, it mean? So let me try
to you know puzzle you a little bit more and what I'm showing here is
this price of flash memory in 2009 taken
again from this website DRAMexchange and
it says that I can buy a 16
gigabit or 2 gigabyte of flash memory for
$12 in in 2009. And it also says
that I can buy a 64 Gigabit
or 8 Gigabyte of memory for $13.
So that, that sounds again, you know, that these
numbers are from 2009 for these number sounds pretty confusing, how can I
buy 2 Gigabyte for 12 dollars and 8 gigabyte for 13 or
around the same price. And the caveat is in this column
over here. So it says that this price for this $12
price for two gigabyte is for SLC or a single-level cell.
And this $13 price for a eight gigabyte is for MLC or multi-level cell.
And it turns out it's, it's the same chip.
It's the exact same chip and they are selling it for a slightly different price.
So what's, what's Exactly happening here and what do these
numbers mean? So lets start by coming back to our
good old
friend.
our NAND flash memory cell, so as we described
in one of the earlier videos, threshold voltage shift.
In this flash memory cell is esentially related
to the, charge stored in your flash memory cell.
It's a very linear relationship and it just
depends on this capacitive coupling with your control gate.
So let's say you had you had
a threshold voltage of your cell which was unprogrammed so
let's say it was you know, somewhere over here less than zero and when you.
Program it it becomes at a very high very high threshold voltage.
And in reality it's it's it's not just
one you know, one voltage level. But, but it's in fact a distribution of a
voltage level so it's.
like many other good things in life, it's a Gaussian distribution.
And this would correspond to the state
zero, and this would correspond to state one.
The reason why I'm drawing these this on a way gigantic separation will
become very clear. So back in you know, 1992, people had
this idea that, you know, I have this So, I have this state, zero which is at
this low threshold voltage, and I have this state
one which is at this very high threshold voltage.
But, you know I have all this voltage
access so this gigantic, access in terms of voltage.
lying in between me so, why don't I use
this, my, good friend this relationship to utilize this.
And store more bits per cell.
So in 1992 people started exploring
this idea of storing more than one bit per cell. So shown here is the
implementation which is two bit per cell are also known as x2
So if you store two bits in one cell, you essentially need four
different levels.
Because two bit means two to power two, or four different levels.
So what you do is essentially instead of
having just this low voltage and high voltage.
a state you now have these different amount of charge.
So you store it different amount of charge and that gives you.
These three of these high voltage
levels and together now you can store essentially you have
four states, so you can store now two bit per cell.
So, here, this is a cartoon but here's the
actual implementation so Showing here in this paper from Toshiba.
So this, what they're showing is they have these four
different threshold voltage levels. So labelled over here you have a
Threshold voltage of somewhere around one and you have a threshold voltage of,
you know, 3.2 I am just writing the number, they are not very accurate.
But just looking from here and then you have these other two threshold voltage levels.
So, you have these four threshold voltages, and
the way they achieve it is essentially they
applied different programming voltages.
To achieve one volt of threshold voltage they apply 15 volt.
To obtain this 3.2 VT they apply a voltage of 18 volts.
So this is, one way that you can essentially double the amount
of bits of, bits stored in one cell. So.
You have
done nothing to the cell, but you have doubled the capacity.
So that would win you a lot of accolades in this environment, for global
economic uncertainty, so let's look what is the future of this?
So can I do three bit per cell, or can I Store three bit, essentially
that would require me to have a two to power three, or eight levels in this
in this range of threshold voltage from this low
to my maximum threshold voltage that I can achieve.
And certainly this gigantic separation does not look any gigantic
anymore because I have to fit these eight levels between them.
But people have been able to do so Moore's law
is
such a task master that it drives people
to do large teams of people to do extraordinary things.
And in fact people have been Able to do this.
And, we'll do this calculation, in our homework.
In a very scale device.
The separation between, the charge which is separating.
this, two different levels is, as you know in the order of,
10 to 20, electrons in a very scaled device, and think about it.
You require you have a retention, requirement of, of ten years,
which means that you don't want to lose one or two of this, electron, per year.
So that's the level that we are operating on so the question I
ask, you know 3 bit per cell sound nice but now I'm getting ahead
of myself I'm getting more and more greedy.
So I'm asking, you know can I can I please do for 4 bit cell.
And in fact, you know, as a means, as hard as the 3 bit a cell.
some people have been able to do this kind of, people have attempted to do this stuff
as well and, what you see is that if
your'e trying to fit that many voltage levels between
this window, you, you get these overlapping regions,
since these distributions, they'll have a certain width.
And what.
So if you, if a cell is over here, it does not know whether it's
in this state, or whether it's in a state two, so which state is this?
And there's a lot of technology which goes into error correction for
these states, and a lot of action has actually in moved the controller space.
So this controller chip.
Whose job is essentially to program and erase, and read these cells.
It has become more and more more and more sophisticated, and nowadays to
program a MLC or you know a cell, you need a different of these program voltages.
So this chip has to generate a multiple of these program voltages.
Also, it will be smart enough to distinguish between these
two states and correct for the cell where it belongs so that
means a lot of startup action in this field as well and these are two,
two local startups. applying which was acquired by SanDisk in
a link media which was ver recently simply acquired by SK Hynix.
So there's a lot of You know exciting stuff happening in this controller space.
So hopefully I have given you some flavor of the MLC or multilevel cell which,
technology which you can use to essentially store
more and more bits in the same device.
So I finally want to end with some food food for thought so
you know, we are, there are these three types of memory devices we talked about.
There's a, there's a flash memory, there's this s ram which we saw in our.
basic microprocess, and this is DRAM chip.
So I talked about MLC operation for flash memory.
The food for thought I wanted to you for is can you
obtain, can you obtain MLC operation in a SRAM and a DRAM cell?
So, that's the thought I want to leave you at.