The Pentium II brand refers to Intel's sixth-generation microarchitecture and x86-compatible microprocessors
introduced on May 7, 1997. Containing 7.5 million transistors, the Pentium II featured
an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5
million transistors. However, its L2 cache subsystem was a downgrade when compared to
Pentium Pros. In early 1999, the Pentium II was superseded by the almost identical Pentium
III, which basically only added SSE instructions to the CPU.
In 1998, Intel stratified the Pentium II family by releasing the Pentium II-based Celeron
line of processors for low-end workstations and the Pentium II Xeon line for servers and
high-end workstations. The Celeron was characterized by a reduced or omitted on-die full-speed
L2 cache and a 66 MT/s FSB. The Xeon was characterized by a range of full-speed L2 cache, a 100 MT/s
FSB, a different physical interface, and support for symmetric multiprocessing.
Overview The Pentium II microprocessor was largely
based upon the microarchitecture of its predecessor, the Pentium Pro, but with some significant
improvements. Unlike previous Pentium and Pentium Pro processors,
the Pentium II CPU was packaged in a slot-based module rather than a CPU socket. The processor
and associated components were carried on a daughterboard similar to a typical expansion
board within a plastic cartridge. A fixed or removable heatsink was carried on one side,
sometimes using its own fan. This larger package was a compromise allowing
Intel to separate the secondary cache from the processor while still keeping it on a
closely coupled back-side bus. The L2 cache ran at half the processor's clock frequency,
unlike the Pentium Pro, whose off die L2 cache ran at the same frequency as the processor.
However, the smallest cache size was increased to 512 KB from the 256 KB on the Pentium
Pro. Off-package cache solved the Pentium Pro's low yields, allowing Intel to introduce
the Pentium II at a mainstream price level. This arrangement also allowed Intel to easily
vary the amount of L2 cache, thus making it possible to target different market segments
with cheaper or more expensive processors and accompanying performance levels.
Intel notably improved 16-bit code execution performance on the Pentium II, an area in
which the Pentium Pro was at a notable handicap. Most consumer software of the day was still
using at least some 16-bit code, because of a variety of factors. The Pentium II went
to 32 KB of L1 cache, double that of the Pentium Pro, as well. The Pentium II was also
the first P6-based CPU to implement the Intel MMX integer SIMD instruction set which had
already been introduced on the Pentium MMX. The Pentium II was basically a more consumer-oriented
version of the Pentium Pro. It was cheaper to manufacture because of the separate, slower
L2 cache memory. The improved 16-bit performance and MMX support made it a better choice for
consumer-level operating systems, such as Windows 9x, and multimedia applications. Combined
with the larger L1 cache and improved 16-bit performance, the slower and cheaper L2 cache's
performance impact was reduced. General processor performance was increased while costs were
cut. Variants
Klamath The original Klamath Pentium II microprocessor
ran at 233, 266, and 300 MHz and were produced in a 0.35 µm process. The 300 MHz version
however only became available in quantities later in 1997. These CPUs had a 66 MHz front
side bus and were initially used on motherboards equipped with the aging Intel 440FX Natoma
chipset designed for the Pentium Pro. In Intel's "FamilyStepping" scheme, Klamath
CPUs are family 6, model 3. Deschutes
The Deschutes core Pentium II, which debuted at 333 MHz in January 1998, was produced
with a 0.25 µm process. The 333 MHz variant was the final Pentium CPU that used the older
66 MHz front side bus; all subsequent Deschutes-core models used a 100 MHz FSB. Later in 1998,
Pentium IIs running at 266, 300, 350, 400, and 450 MHz were also released. The Deschutes
core supported FXSAVE and FXRSTOR instructions, as opposed to Klamath. The die size was 113 mm
2. Towards the end of its design life, Deschutes chips capable of 500 MHz within Intel cooling
and design specifications were produced. However, these were not marketed. Rather than destroy
already multiplier-locked units, those Deschutes units that had been tested and locked with
a multiplier of 5 were sold as being 333 MHz. This was accomplished by disabling the 100 MHz
bus option. Overclockers, upon learning of this, purchased the units in question and
ran them well over 500 MHz; most notably, when overclocking, the final batch of "333MHz"
CPUs were capable of speeds much higher than CPUs sold at 350, 400, or 450 MHz.
Pentium II-based systems using the Intel 440LX Balboa chipset were the first to utilize the
new generation RAM-standard, SDRAM, and the AGP graphics bus. Concurrent with the release
of Deschutes cores supporting a 100 MHz front side bus was Intel's release of the 440BX
Seattle chipset and its related cousins, the 440MX, 450NX, and 440ZX chipsets. Introduction
of the 100 MHz front side bus speed resulted in solid performance improvements for the
Pentium II lineup.
The Pentium II Xeon was a high-end version of Deschutes core intended for use on workstations
and servers. Principally, it used a different type of slot, case, board design, and more
expensive full-speed custom L2 cache, which was off-die. Versions were produced with 512 KB,
1 MB or 2 MB L2 caches by varying the number of 512 KB chips incorporated on the board.
In Intel's "FamilyStepping" scheme, Deschutes CPUs are family 6, model 5 and have the part
number 80523. Pentium II OverDrive
In 1998, the 0.25 μm Deschutes core was utilized in the creation of the Pentium II Overdrive
processor, which was aimed at allowing corporate Pentium Pro users to upgrade their aging servers.
Combining the Deschutes core in a flip-chip package with a 512 KB full-speed L2 cache
chip from the Pentium II Xeon into a Socket 8-compatible module resulted in a 300 or 333 MHz
processor that could run on a 60 or 66 MHz front side bus. This combination brought together
some of the more attractive aspects of the Pentium II and the Pentium II Xeon: MMX support/improved
16-bit performance and full-speed L2 cache, respectively. The later "Dixon" mobile Pentium
II would emulate this combination with 256 KB of full-speed cache.
In Intel's "FamilyStepping" scheme, the Pentium II OverDrive CPU identifies itself as family
6, model 3, though this is misleading, as it is not based on the family 6/model 3 Klamath
core. As noted in the Pentium II Processor update documentation from Intel, "Please note
that although this processor has a CPUID of 163xh, it uses a Pentium II processor CPUID
065xh processor core." Tonga
The 0.25 μm Tonga core was the first mobile Pentium II and had all of the features of
the desktop models. In Intel's "FamilyStepping" scheme, Tonga
CPUs are family 6, model 5. Dixon
Later, in 1999, the 0.25; 0.18 μm Dixon core with 256 KB of on-die full speed cache was
produced for the mobile market. Reviews showed that the Dixon core was the fastest type of
Pentium II produced. In Intel's "FamilyStepping" scheme, Dixon
CPUs are family 6, model 6 and their Intel product code is 80524. These identifiers are
shared with the Mendocino Celeron processors. Core specifications
Desktop
Klamath L1 cache: 16 + 16 KB
L2 cache: 512 KB, as external chips on the CPU module clocked at half the CPU frequency.
Packaging: Slot 1 module MMX
Front-side bus: 66 MHz, GTL+ VCore: 2.8 V
Process: 0.35 µm CMOS First release: May 7, 1997
Clockrate: 233, 266, 300 MHz Deschutes
L1 cache: 16 + 16 KB L2 cache: 512 KB, as external chips on the
CPU module clocked at half the CPU frequency. Packaging: Slot 1 module
MMX Front-side bus: 66, 100 MHz, GTL+
VCore: 2.0 V Process: 0.25 µm CMOS
First release: January 26, 1998 Clockrate: 266–450 MHz
66 MHz FSB : 266, 300, 333 MHz 100 MHz FSB: 350, 400, 450 MHz
Deschutes L1 cache: 16 + 16 KB
L2 cache: 512 KB external chip on CPU module running at 100% of CPU speed
Socket: Socket 8 Front-side bus: 60 or 66 MHz, GTL+
VCore: 3.1–3.3 V Fabrication: 0.25 µm
Based on the Deschutes-generation Pentium II
First release: 1998 Supports MMX technology
The sSpec number SL2KE denotes a Pentium II Overdrive sold with an integrated heatsink/fan
combination for Socket 8. [Note that the sSpec number SL2EA denotes a Pentium II Overdrive
sold with an integrated heatsink but no fan for Slot 1.]
Mobile Tonga
Mobile Pentium II L1 cache: 16 + 16 KB
L2 cache: 512 KB, as external chips on the CPU module clocked at half the CPU frequency.
Package: MMC-1, MMC-2, Mini-Cartridge MMX
Front side bus: 66 MHz, GTL+ VCore: 1.6 V
Process: 0.25 µm CMOS First release: June 7, 1997
Clockrate: 233, 266, 300 MHz Dixon
Mobile Pentium II PE L1 cache: 16 + 16 KB
L2 cache: 256 KB, on-die, full speed. Package: BGA1, MMC-1, MMC-2, μPGA1 PPGA-B615
MMX Front-side bus: 66, 100 MHz, GTL+
VCore: 1.5, 1.55, 1.6, 2.0 V Process: 0.25; 0.18 µm CMOS
First release: January 25, 1999 Clockrate: 266, 300, 333, 366, 400 MHz
Containing 27.4 million transistors Die size is 10.36 mm x 17.36 mm = 179.8496
mm2 See also
List of Intel Pentium II microprocessors Intel Celeron
References
External links Listing of various PII, PIII, and Celeron
alphanumeric model designations CPU-INFO: Intel Pentium II, indepth processor
history Construction Analysis: Intel 266MHz 32-Bit
Pentium II Processor, Integrated Circuit Engineering Corporation
Intel datasheets Pentium II
Pentium II Mobile Pentium II
Mobile Pentium II in Micro-PGA and BGA packages