One of the key enablers for making these 2.5D or 3D chips is this
process technology called through silicon via, or more commonly abbreviated as TSVs.
So these through silicon via, they essentially are critical because
they allow this kind of 3D stacking of of chips.
And they
are essentially what enables this chip to communicate with the
chip above it, and communicate with the chip below it.
And they also bring in the power supply voltage, and so on, so.
One of the most important things to enable these
3D or 2.5D technology is this through silicon via.
So, let's look at the unit process which is involved
for making this through silicon via or TSV.
So these are the different process steps which are which you would
have to encounter if you need to make a, a through silicon real.
So the first thing that you need to is to etch.
So the first thing you need to is etch this silicon, this
trench into the silicon, which would act as your TSV which would,
in which you'll fill up your fill up your TSV material.
one of the critical features of this etch that, is that it's very high aspect
ratio. So, typically this would be anywhere from
100 to 150 micron deep. And it
would not be more than a few micrometer wide.
So it would be you know, from one to five micrometer wide.
You could have it more wider, but
then what you'll compromise is your layout efficiency.
So, if you make it wider, you need a much larger area for each of your TSVs.
So you'll lose your area on your chip for making this TSV.
So of course you don't want to do that. So you want to keep this TSV very small.
At the same time, you need to keep it deep enough such that it it
enables you to connect etch through the entire depth of your wafer.
So that essentially requires that now you have very high aspect ratio for this etch.
So this aspect ratio for this etch would be anywhere from 20 to 100.
And you want to maintain a uniform profile.
So excuse my poor drawing skills here, where I have drawn it as good as it is,
but still you, you, you want it you know, much better than it than your actual TSV.
You want your profile to be vertical uh,as much
as possible, and you want it to be uniform.
So these these etches are very demanding etch.
First of all it's a high aspect ratio and you also want to control your profile.
The next step, which is after this, is is deposition of an oxide.
So this this trench was etched into the silicon material.
Silicon as you know, is a semiconductor, and if we
fill it with a metal it would diffuse into your semiconductor.
Also your signal will now you know get lost in your, in
your silicon chips, so you want to put an insulator in this trench.
So you grow oxide in this trench.
and since it's a very high aspect ratio trench
challenge for growing this oxide is the step coverage.
So you want the same thickness of your oxide on
the top and you want the same thickness on the bottom.
So you a very good step coverage of this oxide growth.
Also another thing which is critical, especially if you are forming
this vias towards the end of your process flow,
is to keep the growth temperature of this oxide low.
So it does not affect the transistors, which have already been made.
and some of these vias will be actually, you know,
they'll become, they'll be carrying say supply voltage or high voltages.
So you want the breakdown voltage of this oxide to be low as well.
The next process
which is after you fill it up with oxide is and before you fill it up with
a metal, is you want to put a barrier layer or a seed layer of metals.
So this barrier layer will prevent the diffusion of
the metal into your silicon or diffusion of your metal into your oxide.
another thing important is the step coverage.
So you want the same
thickness of these metal on the top, and you want the same thickness on the side.
And another important thing is that this metal that
you are filling in is a good diffusion barrier.
The next step you do after that is once
you have a barrier and a seed, you plate it.
So you could plate it with copper or
tungsten and and the, and the requirement for
that plating is to make this field void free.
So make sure that you know, there are no voids left when you plate it.
another very important thing is to minimize the stress during this plating.
So, it's so important let me put in a box that
this, this in fact is you know, very important when you're doing
this fill avoid the stress.
And then the next step and the final step is you polish
off the extra layer on the top, so you remove these, you polish
the top off, and you So, you do a chemical mechanical polishing, and
you then, then, that's it, then your, you know your TSV is done.
So, to summarize these are the different specifications
for the different process steps. So you want you
want a good etch profile. You want it to happen fast.
Remember that you know, we're etching through a very large depth.
We are etching 200, 250 micron deep of silicon.
So we don't want the wafer to wait all day for this etch to happen, so we want a
fast etch.
At the same time, we want it to be low cost.
We want these vertical, nice, smooth sidewalls.
And we again, we want good step coverage for our oxide,
so we want the same thickness of your oxide on the sidewall.
So you want a conformal and a good deposition of this of this oxide layer.
Again, you want
in good metal and barrier film, and you want to avoid stress.
Remember, this is, this is very important, so that you, you will want
to minimize the stress during this whole process flow as much as we can.