So let's look at what a network on chip
might look like. Let's say we have some sort
of a squarish style, that has a core, and
maybe a level one cache. And such styles normally will
be connected to a shared bus. Now let's say
that these four cores are using half of the available
tuples on the bus. Because their cache misses and
coherence need to be taken care of through the bus.
Now let's say we had another set of
those cores pretty much the same thing just replicated.
Now we have an even longer thus possibly
a slower bus, that all traffic from all these
eight cores goes to. So we got a
slower bus probably with less throughput than the original
small one had, yet it has twice the demand
for traffic. So very quickly, it will get saturated.
Now, let's consider a type of on chip network that is called a mesh.
So here, what we have is this quartiles are individually
connected like this, for example. Now there is no more broadcast, but
this core can still send the message to any
other core. If we send the message to this,
this the link that gets used. Meanwhile, this core
could be sending a message here. If we need to
send a message from here to here, then these
two links get used. Meanwhile, we can get these two
links used independently. So as you can see, the total
available throughput in the entire network is several times the
throughput of this individual link. And because it's a
short link we can have a very large throughput. Now
I'm going to take this two by two mesh and
copy it so that I get four of those and
create a four by four mesh that now supports 16 cores, twice as many as here.
Note how many new links are there. Now
if you have neighbor-to-neighbor communication, we can have
these two talking, these two talking, these two
talking all over independent links. So as I
increase the number of cores, I also increase
the number of these links, naturally. So that the
total throughput available in this network grows with
the number of cores. So the number of cores
grows, the number of links grows, and that
allows the available throughput to grow, and that means
that I can have many more cores than I could on the bus. There many of types
of these so-called point to point networks. A mesh
is one of those that is very good for
chip building because none of these links
intersect each other. So because chips are
basically made by printing things on silicon,
it's naturally good to have something that is
kind of flat like this, and doesn't have links going across different nodes. But
we can build chips with some amount of links crossing each other and thus we can
have a mesh which is kind of like what
we have seen. We can have a torus network.
You build the torus by taking the mesh and
connecting the end points to each other so the
torus really takes the link and kind of wraps
it around and then wraps it around and so
on. And then you do that in the other
dimension too. You can think of these processors as basically
things on a donut. You would take this wrap it around,
you get a cylinder. Then you take the end points of the
cylinder, bend it and create a donut so that's why it's
called a taurus. But in reality what you really do. Is you
do this, have a long link that crosses here, and a
long link that crosses here, and so on. And then you also
take this and create a long link that goes here, so
that's how you create a taurus. And then there are even fancier
networks that are still reasonably good for on chip
implementation, such as flattened butterfly. If you're interested in
how these work, a very good place to start
would be an advanced class on on chip interconnects.