Broadwell (microarchitecture) Broadwell is Intel's codename for the 14 nanometer
die shrink of its Haswell microarchitecture, following the Intel's tick-tock principle
as the next step in semiconductor fabrication. Broadwell will adopt the Multi-Chip Package
(MCP) design. The new layout might also move the integrated voltage regulator (IVR) off-die
and back onto the motherboards, in an attempt to reduce the CPU's heat production.
Broadwell will be used in conjunction with Intel 9 Series chipsets.
Expected variants Broadwell is expected to be launched in four
major variants: LGA 1150 socket:
Broadwell-D: desktop version Broadwell-D: desktop version
BGA package:
Broadwell-H: 37 W and 47 W TDP classes, for motherboards with HM86, HM87, QM87 and
the new HM97 chipsets for "all-in-one" systems, mini-ITX form-factor motherboards, and other
small footprint formats. It may come in two different variants, as single and dual chips;
the dual chips (4 cores, 8 threads) will have GT3e and GT2 GPU, while a single chip (SoC;
2 cores, 4 threads) will have GT3e GPU. Maximum supported memory is 32 GB of DDR3L-1600.
Broadwell-U: 15 W and 28 W TDP classes (SoC), for motherboards with PCH-LP chipset for Intel's
ultrabook and NUC platforms. GT3, GT2 and GT1 GPU will be used, while maximum supported
memory is either 16 GB of DDR3L-1600, or 8 GB of LPDDR3-1600.
Broadwell-Y: 4.5 W and 3.5 W TDP class (SoC), for tablets and certain ultrabook-class implementations.
GT2 GPU will be used, while maximum supported memory is 8 GB of LPDDR3-1600.
Broadwell-H: 37 W and 47 W TDP classes, for motherboards with HM86, HM87, QM87 and
the new HM97 chipsets for "all-in-one" systems, mini-ITX form-factor motherboards, and other
small footprint formats. It may come in two different variants, as single and dual chips;
the dual chips (4 cores, 8 threads) will have GT3e and GT2 GPU, while a single chip (SoC;
2 cores, 4 threads) will have GT3e GPU. Maximum supported memory is 32 GB of DDR3L-1600.
Broadwell-U: 15 W and 28 W TDP classes (SoC), for motherboards with PCH-LP chipset for Intel's
ultrabook and NUC platforms. GT3, GT2 and GT1 GPU will be used, while maximum supported
memory is either 16 GB of DDR3L-1600, or 8 GB of LPDDR3-1600.
Broadwell-Y: 4.5 W and 3.5 W TDP class (SoC), for tablets and certain ultrabook-class implementations.
GT2 GPU will be used, while maximum supported memory is 8 GB of LPDDR3-1600.
rPGA 947 socket:
Broadwell-M: mobile/laptop version Broadwell-M: mobile/laptop version
LGA 2011-3 socket:
Broadwell-EP: To be marked as Xeon E5-2600 v4 etc., while using the C610 Wellsburg chipset
platform. Up to 18 cores and 36 threads, up to 45 MB of total cache and 40 PCI Express
3.0 lanes, with 70–160 W TDP classes. Maximum supported memory speed is quad-channel DDR4-2400.
Broadwell-EX: Brickland platform, for mission-critical servers. Intel QuickPath Interconnect (QPI)
is expected to be updated to version 1.1, enabling seamless scaling beyond eight-socket
systems. Maximum supported memory speeds are expected to be DDR3-1600 and DDR4-3200.
Broadwell-EP: To be marked as Xeon E5-2600 v4 etc., while using the C610 Wellsburg chipset
platform. Up to 18 cores and 36 threads, up to 45 MB of total cache and 40 PCI Express
3.0 lanes, with 70–160 W TDP classes. Maximum supported memory speed is quad-channel DDR4-2400.
Broadwell-EX: Brickland platform, for mission-critical servers. Intel QuickPath Interconnect (QPI)
is expected to be updated to version 1.1, enabling seamless scaling beyond eight-socket
systems. Maximum supported memory speeds are expected to be DDR3-1600 and DDR4-3200.
Instruction set extensions Broadwell will introduce some instruction
set architecture extensions: Intel ADX: ADOX, ADCX and MULX for improving
performance of arbitrary-precision integer operations
RDSEED for generating 16-, 32- or 64-bit random numbers according to NIST SP 800-90B and 800-90C
PREFETCHW instruction. New features
Broadwell's Intel Quick Sync Video hardware video decoder adds VP8 hardware decoding support.
Also, it will have two independent bit stream decoder (BSD) rings to process video commands
on GT3 GPUs; this will allow one BSD ring to process decoding and the other BSD ring
to process encoding at the same time. Roadmap
On September 10, 2013, Intel showcased the Broadwell 14 nm processor in a demonstration
at IDF. Intel CEO Brian Krzanich claimed that the chip would allow systems to provide a
30 percent improvement in power use over the Haswell chips released in mid-2013.
On October 21, 2013, a leaked Intel roadmap indicated a late 2014 or early 2015 release
of the K-series Broadwell on the LGA 1150 platform, in parallel with the previously
announced Haswell refresh. This will coincide with the release of Intel's 9-series chipset,
which may be required for Broadwell processors due to a change in power specifications for
its LGA 1150 socket. On 12 February 2014, digitimes.com quoted
"upstream supply chain" sources saying that Broadwell production had been postponed from
the first quarter of 2014 to the fourth quarter of 2014, with mass shipments in the first
quarter of 2015. No new mobile roadmaps have yet leaked to
clarify if mobile Broadwell will be available in 2014. A leaked slide shows Broadwell-E/EP/EX
in 2015.