Pretty much everything that we do to enhance scaling in
the present day scenario, involves a lot of compromises.
It involves, first of all it's very challenges and
everything you do it has compromises on the device level.
So what I want to do in this video is give
you a flavor of the challenges that people face from a.
Processing point of view in making these FinFET or 3-D transistors.
So these FinFET are 3-D devices and they involve edges.
That is you have a transport happening on these edges.
They also involve these corners that you get
between your top surface and your vertical side walls.
So this complicates this brings into play a lot of challenges
as shown here is this 3D cross-section of a FinFET
device. And as you can imagine the, this
fin being tall and having all these edges and corners
It requires a very conformal deposition of, of your gate dielectric.
So, your gate dielectric will wrap around this fin, so it has to be conformal.
Similarly, your gate metal, has to be conformal.
So there are process challenges related to conformity of the fins and
especially, sim, similarly when you make your contact to your source and drain,
it has to wrap around this source and drain part of your fin.
And that's again a conformal process.
So, what I want to do in this video is, I'll
talk about three There are many, many of these process challenges.
But I want to talk about three of these challenges that are related to the 3-D
nature of this FinFET device.
So the first challenge I want to talk about is, is corner effects.
So one of the things that you cannot avoid in in a FinFET device is
essentially having these corners that you have between
your vertical side wall and your top surface.
So you have these corners over here.
And as you might remember from your you know, from your high school level of
physics that whenever you have a constant
a potential, so you have this constant potential surface.
The electric field at the corner is always
amplified as compared to electric field at this edge.
So you have a much larger electric field that
you get at the corner as compared to edge.
So this the same phenomena holds true in in this.
FinFET device, so when you apply, apply a gate voltage over here, you get a
much higher electric field in this region, as
compared to what you get on your side walls.
And this is kind of illustrated in this figure over here.
So this is let's say plotting
the electron density at a voltage slightly over my threshold voltage.
And what I see here is that because of this higher field at
the corner, I'm getting a much larger population of electrons are plotted here.
This population of electrons, I'm getting this much higher electron
density in my edges as compared to the, you know,
at, at my corner as compared to these sidewalls.
So here is this another picture illustrating the same effect.
So again, what I'm, plotting here is, the current density and,
again, this is a plotted at a voltage in here to my threshold voltage.
And what I see again is these corner are my corner
of these the Fin, device.
They already are really uh,uh, conducting current and they have turned on and
you can see there is current density or current flowing through these corners.
And this is essentially bad for my device.
So these are corner effects. They try to negate
these are pretty bad for your device performance.
And they try to negate all
the hard work that we put into, this,uh, making this Finfet device.
So, as we saw earlier, one of the unique advantages that you
get from making, this, FinFET device is you get a much better electrostatic.
So your sub-threshold slope improves and you get a much sharper turn
on, of your device and you get a much improved sub-threshold slope.
What these corner effects
tends to do, is now that you have this corner, at your corner what
happens if you have a device that turns on at a much lower voltage.
Because it has a much higher electric field so it has a much lower VT.
And then you have also another device, which is essentially
your edge and that turns on at a higher VT.
So you have these multiple VTs happening
in the same device.
And as a result of that, if you
combine all of theses, essentially you are adding these
two channels in parallel. And what it leads
to is that your sub threshold slope now degrades.
So this is very bad for our device performance.
So the next question we ask ourselves is how do
we, can we do something to avoid these corner effects.
So can we get rid of these counter effects?
So the answer is very simple, you know, if you want to get rid
of corner effects, get rid of your corners so get rid of these corners.
So how do we do that?
So there are multiple ways we can do that.
We can round off these corners shown here as the one such approach.
Where what you have if you have these side walls but at the top
you round them off.
So one way to do that is take this kind of a fin and anneal
it in a hydrogen environment. And these hydrogen uh,
they tend to round of your edges, so you can get this kind of a profile.
Another way to do that is to make this kind of a tapered fin
and make this, instead of having this vertical fin, you have this tapered fin.
And you get you don't get any corners at the top.
So the, but there is some cons to doing that as well so one con, one disadvantage
of this is that a FinFET or a
trigate device essentially you'd have a constant width.
When you try to, when you try to taper it you get multiple of these widths.
So you have one width over here, you have another width over here.
Similarly over here you have one width in majority
of device but you have another width over here.
And we'll see later that your device threshold
voltage
or your electrostatic is very sensitive to your width.
So having these multiple widths is not good for your device performance.
Another another disadvantage you get by doing this is that
you are now having transport on off axis so, you know.
So for example, you had this crystalline in plane
which was say 100 and here it was 110.
So when you are doing it at an angle you don't have a crystalline plane.
So what you have on these on this edge and on this corner is this off axis plane so
you are not on a any of the known crystalline
axis such as 100 or 110.
or 111 but you're on a different crystalline plane and
that's also bad for our device as, as we'll see later.
So both these approaches have
some, some advantages that you can uh,round off your corners but they
also come with these set of disadvantages. Another way to round off your corners.
So remember when we define our fins, we
had this nitride, nitride as a layer on the top.
And we can essentially keep that on and then we can wrap our oxide around this and
make our transistor but we essentially use these side walls.
But since we have this, thick dielectric or this thin nitride,
thick Nitride layer over here, we don't use the top surface.
And this is, you know ideal, 2D device or it's, the finFET device, it,
it has, it avoids these, corner effects. But not using
the top surface at all.
So all these are different approaches you can use to avoid corner effects.